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FDG8842CZ

FDG8842CZ

FDG8842CZ

ON Semiconductor

FDG8842CZ datasheet pdf and Transistors - FETs, MOSFETs - Arrays product details from ON Semiconductor stock available on our website

SOT-23

FDG8842CZ Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Factory Lead Time 10 Weeks
Lifecycle Status ACTIVE (Last Updated: 2 days ago)
Contact PlatingTin
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 6-TSSOP, SC-88, SOT-363
Number of Pins 6
Weight 28mg
Transistor Element Material SILICON
Operating Temperature-55°C~150°C TJ
PackagingTape & Reel (TR)
Published 2007
Series PowerTrench®
JESD-609 Code e3
Pbfree Code yes
Part StatusActive
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 6
Termination SMD/SMT
ECCN Code EAR99
Resistance 400MOhm
Subcategory Other Transistors
Max Power Dissipation300mW
Terminal FormGULL WING
Peak Reflow Temperature (Cel) NOT SPECIFIED
[email protected] Reflow Temperature-Max (s) NOT SPECIFIED
Qualification StatusNot Qualified
Number of Elements 2
Element ConfigurationDual
Operating ModeENHANCEMENT MODE
Power Dissipation360mW
FET Type N and P-Channel
Transistor Application SWITCHING
Rds On (Max) @ Id, Vgs 400m Ω @ 750mA, 4.5V
Vgs(th) (Max) @ Id 1.5V @ 250μA
Input Capacitance (Ciss) (Max) @ Vds 120pF @ 10V
Current - Continuous Drain (Id) @ 25°C 750mA 410mA
Gate Charge (Qg) (Max) @ Vgs 1.44nC @ 4.5V
Rise Time16ns
Drain to Source Voltage (Vdss) 30V 25V
Polarity/Channel Type N-CHANNEL AND P-CHANNEL
Fall Time (Typ) 16 ns
Turn-Off Delay Time 35 ns
Continuous Drain Current (ID) 750mA
Threshold Voltage 1V
Gate to Source Voltage (Vgs) -8V
Drain Current-Max (Abs) (ID) 0.75A
Drain to Source Breakdown Voltage 25V
Dual Supply Voltage 30V
FET Technology METAL-OXIDE SEMICONDUCTOR
FET Feature Logic Level Gate
Nominal Vgs 1 V
Height 1mm
Length 2mm
Width 1.25mm
REACH SVHC No SVHC
RoHS StatusROHS3 Compliant
Lead Free Lead Free
In-Stock:11165 items

Pricing & Ordering

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FDG8842CZ Product Details

FDG8842CZ Description

These Numbp channel logic level enhanced mode field effect transistors are manufactured using on Semiconductor's proprietary high cell density DMOS technology. This very high-density process is specially tailored to minimize on-resistance. The device is specially designed for low-voltage applications as a substitute for bipolar digital transistors and small-signal MOSFET. Because there is no need for bias resistors, this dual-digital FET can replace several different digital transistors with different bias resistance values.


FDG8842CZ Features


Q1: N-Channel

Max rDS(on) = 0.4Ω at VGS = 4.5V, ID = 0.75A

Max rDS(on) = 0.5Ω at VGS = 2.7V, ID = 0.67A

Q2: P-Channel

Max rDS(on) = 1.1Ω at VGS = –4.5V, ID = –0.41A

Max rDS(on) = 1.5Ω at VGS = –2.7V, ID = –0.25A

Very low level gate drive requirements allowing direct

operation in 3V circuits(VGS(th) <1.5V)

Very small package outline SC70-6

RoHS Compliant


FDG8842CZ Applications


low-voltage applications





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