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XC95288-15BGG352I

XC95288-15BGG352I

XC95288-15BGG352I

Xilinx

1.27mm PMIC 5V

SOT-23

XC95288-15BGG352I Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Surface MountYES
Published 1996
JESD-609 Code e1
Pbfree Code yes
Part StatusDiscontinued
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 352
ECCN Code EAR99
Terminal Finish Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5)
Technology CMOS
Terminal Position BOTTOM
Terminal FormBALL
Peak Reflow Temperature (Cel) 260
Supply Voltage 5V
Terminal Pitch1.27mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count352
JESD-30 Code S-PBGA-B352
Qualification StatusNot Qualified
Operating Temperature (Min) -40°C
Operating Supply Voltage5V
Temperature GradeINDUSTRIAL
Number of I/O 192
Clock Frequency 55.6MHz
Propagation Delay15 ns
Organization 0 DEDICATED INPUTS, 192 I/O
Programmable Logic TypeFLASH PLD
Number of Logic Blocks (LABs) 8
Output FunctionMACROCELL
Length 35mm
Height Seated (Max) 1.7mm
Width 35mm
RoHS StatusNon-RoHS Compliant
In-Stock:1906 items

XC95288-15BGG352I Product Details

XC95288-15BGG352I Overview


There are 192 I/Os on the board.Terminations of devices are set to 352.BOTTOM is the terminal position of this electrical part.A voltage of 5Vprovides power to the device.In this chip, the 352 pins are programmed.Optimal efficiency requires a supply voltage of 5V.The program consists of 8 logic blocks (LABs).Ideally, its clock frequency should not exceed 55.6MHz.It is possible to classify programmable logic as FLASH PLD.It should be at least -40°C when the computer is operating.

XC95288-15BGG352I Features


192 I/Os
352 pin count
8 logic blocks (LABs)


XC95288-15BGG352I Applications


There are a lot of Xilinx
XC95288-15BGG352I CPLDs applications.


  • Bootloaders for FPGAs
  • Address decoders
  • Custom state machines
  • Digital systems
  • Portable digital devices
  • Handheld digital devices
  • Battery operated portable devices
  • Complex programmable logic devices
  • Digital designs
  • Field programmable gate

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