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LMK04832NKDT

LMK04832NKDT

LMK04832NKDT

Texas Instruments

3.3V Jitter Cleaner 3.255GHz LMK04832 Clock Generators 64-WFQFN Exposed Pad 64 Terminals Surface Mount 3.15V~3.45V Tape & Reel (TR)

SOT-23

LMK04832NKDT Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Factory Lead Time 6 Weeks
Lifecycle Status ACTIVE (Last Updated: 1 week ago)
Mounting Type Surface Mount
Package / Case 64-WFQFN Exposed Pad
Surface MountYES
Number of Pins 64
Operating Temperature-40°C~85°C TA
PackagingTape & Reel (TR)
JESD-609 Code e3
Pbfree Code yes
Part StatusActive
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 64
ECCN Code EAR99
Type Jitter Cleaner
Terminal Finish Matte Tin (Sn)
Voltage - Supply 3.15V~3.45V
Terminal Position QUAD
Terminal FormNO LEAD
Peak Reflow Temperature (Cel) NOT SPECIFIED
Supply Voltage 3.3V
Terminal Pitch0.5mm
Frequency 3.25GHz
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number LMK04832
Output CML, HSDS, LCPECL, LVCMOS, LVDS, LVPECL
Number of Outputs 14
Frequency (Max) 3.255GHz
Number of Inputs 3
Input Clock
Ratio - Input:Output 3:14
Primary Clock/Crystal Frequency-Nom 250MHz
PLL Yes
Differential - Input:Output Yes/Yes
Divider/Multiplier Yes/No
Height 800μm
Length 9mm
Width 9mm
Thickness 0m
RoHS StatusROHS3 Compliant
In-Stock:260 items

Pricing & Ordering

QuantityUnit PriceExt. Price
250$23.60600$5901.5

LMK04832NKDT Product Details

LMK04832NKDT Description


The LMK04832NKDT is an ultra-high-performance clock conditioner with JEDEC JESD204B support and is also pin compatible with the LMK0482x family of devices. The 14 clock outputs from PLL2 can be configured to drive seven JESD204B converters or other logic devices using device and SYSREF clocks. SYSREF can be provided using both DC and AC coupling. Not limited to JESD204B applications, each of the 14 outputs can be individually configured as high-performance outputs for traditional clocking systems.



LMK04832NKDT Features


Maximum Clock Output Frequency: 3255 MHz

Multi-Mode: Dual PLL, Single PLL, and Clock Distribution

1-1023 CLKout Divider

1-8191 SYSREF Divider

25-ps Step Analog Delay for SYSREF Clocks

Digital Delay and Dynamic Digital Delay for Device Clock and SYSREF



LMK04832NKDT Applications


Test and Measurement

RADAR

Microwave Backhaul

Data Converter Clocking


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