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5962-8960101MRA(E2VNSC)

5962-8960101MRA(E2VNSC)

5962-8960101MRA(E2VNSC)

Teledyne e2v

Flip Flop

SOT-23

5962-8960101MRA(E2VNSC) Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Package Width 7.87(Max)
PCB changed 20
Lead Shape Through Hole
Package Length 25.02(Max)
Package Height 4.57(Max)
Mounting Through Hole
Supplier Package CDIP
Standard Package Name DIP
Supplier Temperature Grade Military
Maximum Operating Temperature (°C) 125
Minimum Operating Temperature (°C) -55
Propagation Delay Test Condition (pF) 50
Maximum Quiescent Current (mA) 3.5
Maximum Operating Supply Voltage (V) 5.5
Typical Operating Supply Voltage (V) 5
Minimum Operating Supply Voltage (V) 4.5
Maximum High Level Output Current (mA) -24
Maximum Low Level Output Current (mA) 24
Input Signal Type Single-Ended
Process Technology CMOS
Absolute Propagation Delay Time (ns) 13.5
Maximum Propagation Delay Time @ Maximum CL (ns) [email protected]
Triggering Type Positive-Edge
Bus Hold No
Number of Output Enables per Element 1
Number of Element Outputs 8
Number of Element Inputs 8
Number of Elements per Chip 1
Number of Channels per Chip 8
Logic Family ACT
ECCN (US) EAR99
Part StatusActive
Pin Count20
Output Type 3-State
Polarity Non-Inverting
Logic Function D-Type Bus Interface
RoHS StatusRoHS non-compliant
In-Stock:1873 items

5962-8960101MRA(E2VNSC) Product Details

5962-8960101MRA(E2VNSC) Overview


It is configured with 3-Stateas an output. The D latch is equipped with 20 pins.

5962-8960101MRA(E2VNSC) Features


20 pin count


5962-8960101MRA(E2VNSC) Applications


There are a lot of Teledyne e2v
5962-8960101MRA(E2VNSC) Flip Flops applications.


  • Data storage
  • Data transfer
  • Latch
  • Registers
  • Memory
  • Frequency division
  • Memory
  • Event Detectors
  • Data Synchronizers
  • Asynchronous counter

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