NCP5210MNR2G Description
A full power solution for MCH and DDR memory is provided by the NCP5210MNR2G, a 3-in-1 PWM Dual Buck and Linear DDR Power Controller. This IC combines the ease of a linear regulator for the VTT termination voltage with the effectiveness of PWM controllers for the VDDQ supply and the MCH core supply voltage. This IC has two synchronous PWM buck controllers that drive four external N-Ch FETs to create the MCH regulator and the DDR memory supply voltage (VDDQ). The DDR memory termination regulator (VTT) is made to track with sourcing and sinking current at half of the reference voltage.
Soft-start circuitry, undervoltage monitoring of the 5VDUAL and BOOT voltages, and heat shutdown are examples of protective features. The component is contained in a thermally improved, compact QFN-20 package.
NCP5210MNR2G Features
Thermal Shutdown
5x6 QFN?20 Package
Pb?Free Package is Available*
Soft?Start Protection for all Controllers
VTT Tracks at Half the Reference Voltage
Undervoltage Monitor of Supply Voltages
All External Power MOSFETs are N?Channel
Adjustable VDDQ and VMCH by External Dividers
Overcurrent Protections for DDQ and VTT Regulators
Fully Complies with ACPI Power Sequencing Specifications
Fixed Switching Frequency of 250 kHz for VDDQ and VMCH
Integrated Power FETs with VTT Regulator Source/Sink up to 2.0 A
Incorporates Synchronous PWM Buck Controllers for VDDQ and VMCH
Short Circuit Protection Prevents Damage to Power Supply Due to Reverse DIMM Insertion
Doubled Switching Frequency of 500 kHz for VDDQ Controller in Standby Mode to Optimize Inductor Current Ripple and Efficiency
NCP5210MNR2G Applications
