FDPC5018SG Description
The device includes two specialized N-channel MOSFET in the dual package. The switch nodes are connected internally for easy placement and wiring of synchronous step-down converters. The control of MOSFET (Q1) and synchronous FET (Q2) is designed to provide optimal power efficiency.
FDPC5018SG Features
Q1 N-Channel
Max. RDS(on) = 5.0 m|? at VGS = 10 V, ID = 17 A
Max. RDS(on) = 6.5 m|? at VGS = 10 V, ID = 17 A
Q2 N-Channel
Max. RDS(on) = 1.6 m|? at VGS = 10 V, ID = 32 A
Max. RDS(on) = 2.0 m|? at VGS = 4.5 V, ID = 28 A
Low Inductance Packaging Shortens Rise/Fall Times, Resulting in Lower Switching Losses
MOSFET Integration Enables Optimum Layout for Lower Circuit Inductance and Reduced Switch Node Ringing
RoHS Compliant
FDPC5018SG Applications
Computing
Communications
General Purpose Point of Load
