2N5457_D74Z Description
A schematic representation of an n channel JFET is shown in Figure 118. An n-type channel is formed between two p-type layers which are connected to the gate. Majority carrier electrons flow from the source and exit the drain, forming the drain current.
2N5457_D74Z Applications
analog switching applications
Sourced from Process 55.
2N5457_D74Z Features
HighspeedF5technologyoffering
?Best-in-Classefficiencyinhardswitchingandresonant
Topologies
?650Vbreakdownvoltage
?LowQg
?IdealfitwithSICSchottkyDiodeinboostconverters
?Maximumjunctiontemperature175°C