74LV374DB,118 Overview
It is embeded in 20-SSOP (0.209, 5.30mm Width) case. It is contained within the Tape & Reel (TR)package. T flip flop uses Tri-State, Non-Invertedas its output configuration. JK flip flop uses Positive Edgeas the trigger. Surface Mountmounts this electrical part. The JK flip flop operates with an input voltage of 1V~5.5V volts. The operating temperature is -40°C~125°C TA. This D latch has the type D-Type. It is a type of FPGA belonging to the 74LV series. Its output frequency should not exceed 77MHz. In total, it contains 1 elements. During its operation, it consumes 160μA quiescent energy. D latch belongs to the 74LV374 family. This JK flip flop has a 3.5pFfarad input capacitance.
74LV374DB,118 Features
Tape & Reel (TR) package
74LV series
74LV374DB,118 Applications
There are a lot of NXP USA Inc. 74LV374DB,118 Flip Flops applications.
- Control circuits
- QML qualified product
- Clock pulse
- Instrumentation
- High Performance Logic for test systems
- Buffered Clock
- Memory
- Guaranteed simultaneous switching noise level
- Computers
- Computing
