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A2F500M3G-PQ208

A2F500M3G-PQ208

A2F500M3G-PQ208

Microsemi Corporation

208 Terminations 0°C~85°C TJ 208 Pin A2F500M3G System On Chip SmartFusion® Series MCU - 22, FPGA - 66 I/O 1.5V

SOT-23

A2F500M3G-PQ208 Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Factory Lead Time 12 Weeks
Package / Case 208-BFQFP
Surface MountYES
Number of Pins 208
Operating Temperature0°C~85°C TJ
PackagingTray
Series SmartFusion®
Published 2015
JESD-609 Code e0
Part StatusObsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 208
Terminal Finish Tin/Lead (Sn/Pb)
HTS Code8542.39.00.01
Terminal Position QUAD
Terminal FormGULL WING
Peak Reflow Temperature (Cel) 225
Supply Voltage 1.5V
Terminal Pitch0.5mm
Frequency 80MHz
Time@Peak Reflow Temperature-Max (s) 20
Base Part Number A2F500M3G
Supply Voltage-Max (Vsup) 1.575V
Supply Voltage-Min (Vsup) 1.425V
Interface Ethernet, I2C, SPI, UART, USART
Number of I/O MCU - 22, FPGA - 66
RAM Size 64KB
Core Processor ARM® Cortex®-M3
Peripherals DMA, POR, WDT
Connectivity Ethernet, I2C, SPI, UART/USART
Architecture MCU, FPGA
Organization 11520 CLBS, 500000 GATES
Programmable Logic TypeFIELD PROGRAMMABLE GATE ARRAY
Core Architecture ARM
Number of Logic Blocks (LABs) 24
Primary Attributes ProASIC®3 FPGA, 500K Gates, 11520 D-Flip-Flops
Number of Equivalent Gates 500000
Flash Size 512KB
Length 28mm
Height Seated (Max) 4.1mm
Width 28mm
RoHS StatusNon-RoHS Compliant
In-Stock:1876 items

A2F500M3G-PQ208 Product Details

This SoC is built on ARM® Cortex®-M3 core processor(s).


Based on the core processor(s) ARM® Cortex®-M3, this SoC has been developed.There is a 208-BFQFP package assigned to this system on a chip by the manufacturer.With 64KB RAM implemented, this SoC chip provides reliable operation.A MCU, FPGA technique is used for the SoC design's internal architecture.SmartFusion® is the series name of this system on chip SoC.This SoC meaning should have an average operating temperature of 0°C~85°C TJ when it is operating normally.A significant feature of this SoC security is the combination of ProASIC®3 FPGA, 500K Gates, 11520 D-Flip-Flops.There is a state-of-the-art Tray package that houses this SoC system on a chip.As a whole, this SoC part is comprised of MCU - 22, FPGA - 66 inputs and outputs.Ideally, a power supply with a voltage of 1.5V should be used.An excessive voltage of 1.575V is considered unsafe for the SoCs wireless, so voltages higher than that are not allowed.As long as it receives a power supply that is at least 1.425V, it should be able to function.In order to cater to different design requirements, FIELD PROGRAMMABLE GATE ARRAY can be reconfigured to serve different needs.system on a chip benefits from 208 terminations.This flash has a size of 512KB.It is possible to find system on chips that are similar in specs and purpose by searching for A2F500M3G.During operation, the wireless SoC runs at a frequency of 80MHz.There are a number of features to this SoC meaning which are based on the core architecture of ARM.The computer SoC has a pin count of 208.

ARM® Cortex®-M3 processor.


64KB RAM.
Built on MCU, FPGA.
512KB extended flash.
Core Architecture: ARM


There are a lot of Microsemi Corporation


A2F500M3G-PQ208 System On Chip (SoC) applications.


  • Networked sensors
  • Robotics
  • Central alarm system
  • Smart appliances
  • Industrial automation devices
  • Sports
  • Fitness
  • Healthcare
  • Medical
  • Remote control

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