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CY7C373I-100JC

CY7C373I-100JC

CY7C373I-100JC

Cypress Semiconductor

1.27mm PMIC 84 Pin 5V PLCC

SOT-23

CY7C373I-100JC Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Mount Surface Mount
Package / Case PLCC
Number of Pins 84
PackagingBulk
JESD-609 Code e0
Number of Terminations 84
Terminal Finish Tin/Lead (Sn/Pb)
Max Operating Temperature70°C
Min Operating Temperature 0°C
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal FormJ BEND
Supply Voltage 5V
Terminal Pitch1.27mm
Reach Compliance Code not_compliant
Pin Count84
Qualification StatusNot Qualified
Operating Supply Voltage5V
Temperature GradeCOMMERCIAL
Max Supply Voltage5.25V
Min Supply Voltage4.75V
Number of I/O 69
Memory TypeFLASH
Clock Frequency 80MHz
Propagation Delay12 ns
Number of Logic Blocks (LABs) 4
Output FunctionMACROCELL
Number of Macro Cells 64
JTAG BST NO
Number of Dedicated Inputs 1
In-System Programmable YES
Length 29.3116mm
Height Seated (Max) 5.08mm
Width 29.3116mm
RoHS StatusNon-RoHS Compliant
Lead Free Contains Lead
In-Stock:1987 items

CY7C373I-100JC Product Details

CY7C373I-100JC Overview


64 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.The item is enclosed in a PLCC package.The device is programmed with 69 I/O ports.It is programmed to terminate devices at 84.There is a QUAD terminal position on the electrical part in question.The device is powered by a voltage of 5V volts.It is a part of the family Programmable Logic Devices.It is recommended that the chip be packaged by Bulk.With 84 pins programmed, the chip is ready to use.If high efficiency is desired, the supply voltage should be kept at 5V.It is recommended that data be stored in FLASH.In this case, it is mounted by Surface Mount.The pins are 84.This device operates at a voltage of 5.25V when the maximum supply voltage is applied.With a minimal supply voltage of 4.75V, it operates.It is recommended that the operating temperature be higher than 0°C.It is recommended that the operating temperature be below 70°C.4 logic blocks (LABs) make up this circuit.The status of input signals is determined by 1 dedicated inputs.The clock frequency of this device should not exceed 80MHz.

CY7C373I-100JC Features


PLCC package
69 I/Os
84 pin count
84 pins
4 logic blocks (LABs)


CY7C373I-100JC Applications


There are a lot of Cypress Semiconductor
CY7C373I-100JC CPLDs applications.


  • Digital systems
  • Portable digital devices
  • Handheld digital devices
  • Battery operated portable devices
  • Complex programmable logic devices
  • Digital designs
  • Field programmable gate
  • Address decoding
  • D/T registers and latches
  • Synchronous or asynchronous mode

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