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EP4CE10F17I7N

EP4CE10F17I7N

EP4CE10F17I7N

Intel

1.55mm mm FPGAs Cyclone? IV E Series 256-LBGA 1mm mm 256

SOT-23

EP4CE10F17I7N Datasheet

non-compliant

In-Stock: 0 items
Specifications
Name Value
Type Parameter
Factory Lead Time 8 Weeks
Mounting Type Surface Mount
Package / Case 256-LBGA
Surface Mount YES
Operating Temperature -40°C~100°C TJ
Packaging Tray
Published 2016
Series Cyclone® IV E
JESD-609 Code e1
Part Status Active
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 256
Terminal Finish Tin/Silver/Copper (Sn/Ag/Cu)
HTS Code 8542.39.00.01
Subcategory Field Programmable Gate Arrays
Voltage - Supply 1.15V~1.25V
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.2V
Terminal Pitch 1mm
[email protected] Reflow Temperature-Max (s) 40
Base Part Number EP4CE10
JESD-30 Code S-PBGA-B256
Number of Outputs 179
Qualification Status Not Qualified
Power Supplies 1.21.2/3.32.5V
Number of I/O 179
Clock Frequency 472.5MHz
Number of Inputs 179
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Number of Logic Elements/Cells 10320
Total RAM Bits 423936
Number of LABs/CLBs 645
Number of CLBs 645
Height Seated (Max) 1.55mm
Length 17mm
Width 17mm
RoHS Status RoHS Compliant
Pricing & Ordering
Quantity Unit Price Ext. Price
1 $40.40000 $40.4
EP4CE10F17I7N Product Details

EP4CE10F17I7N Description


EP4CE10F17I7N belongs to an Embedded - FPGAs (Field Programmable Gate Array). A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturing – hence the term field-programmable. The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC). Circuit diagrams were previously used to specify the configuration, but this is increasingly rare due to the advent of electronic design automation tools.



EP4CE10F17I7N Features


Low-cost, low-power FPGA fabric

Flexible clocking structure to support multiple protocols in a single transceiver block

Up to 532 users I/Os

Up to eight phase-locked loops (PLLs) per device

Offered in commercial and industrial temperature grades

Up to 360 18 × 18 multipliers for DSP processing-intensive applications



EP4CE10F17I7N Applications


Space

Hardware security modules

Automotive 

Infotainment & cluster 

Communications equipment 

Wireless infrastructure 

Industrial 

Medical


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