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XCR3064XL-7VQG44I

XCR3064XL-7VQG44I

XCR3064XL-7VQG44I

Xilinx Inc.

0.8mm PMIC CoolRunner XPLA3 Series 44 Pin 3.3V 44-TQFP

SOT-23

XCR3064XL-7VQG44I Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Factory Lead Time 10 Weeks
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 44-TQFP
Number of Pins 44
Operating Temperature-40°C~85°C TA
PackagingTray
Published 1996
Series CoolRunner XPLA3
JESD-609 Code e3
Pbfree Code yes
Part StatusActive
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 44
ECCN Code EAR99
Terminal Finish Matte Tin (Sn)
Additional FeatureYES
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal FormGULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch0.8mm
[email protected] Reflow Temperature-Max (s) 30
Pin Count44
Qualification StatusNot Qualified
Operating Supply Voltage3.3V
Supply Voltage-Max (Vsup) 3.6V
Programmable TypeIn System Programmable (min 1K program/erase cycles)
Number of I/O 36
Memory TypeEEPROM
Propagation Delay7.5 ns
Number of Logic Elements/Cells 4
Number of Gates1500
Max Frequency 119MHz
Speed Grade 7
Output FunctionMACROCELL
Number of Macro Cells 64
JTAG BST YES
Voltage Supply - Internal 2.7V~3.6V
Delay Time tpd(1) Max 7ns
Height Seated (Max) 1.2mm
Length 10mm
Width 10mm
RoHS StatusROHS3 Compliant
In-Stock:335 items

Pricing & Ordering

QuantityUnit PriceExt. Price
160$9.00006$1440.0096

XCR3064XL-7VQG44I Product Details

XCR3064XL-7VQG44I Description


The CoolRunner XCR3064XL-7VQG44I (eXtended Programmable Logic Array) CPLDs are targeted for low-power systems that include portable, handheld, and power-sensitive applications. The XCR3064XL-7VQG44I includes Fast Zero Power (FZP) design technology that combines low power and high speed. With this design technique, the CoolRunner XPLA3 family offers true pin-to-pin speeds of 5.0 ns, while simultaneously delivering power that is less than 56 μW at standby without the need for "turbo bits" or other power-down schemes. By replacing conventional sense amplifier methods for implementing product terms (a technique that has been used in PLDs since the bipolar era) with a cascaded chain of pure CMOS gates, the dynamic power is also substantially lower than any other CPLD.



XCR3064XL-7VQG44I Features


The fast Zero Power (FZP) design technique provides ultra-low power and very high speed

Innovative CoolRunner™ XPLA3 architecture combines high speed with extreme flexibility

Excellent pin retention during design changes

Available in commercial grade and extended voltage(2.7V to 3.6V) industrial grade

5V tolerant I/O pins

Input register setup time of 2.5 ns

Single pass logic expandable to 48 product terms

High-speed pin-to-pin delays of 5.0 ns

Slew rate control per output

100% routable

Security bit prevents unauthorized access

Supports hot-plugging capability



XCR3064XL-7VQG44I Applications


Communications equipment

Wireless infrastructure

Industrial

Power delivery

Enterprise systems

Datacenter & enterprise computing


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