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XCR3064XL-7CP56C

XCR3064XL-7CP56C

XCR3064XL-7CP56C

Xilinx

0.5mm PMIC 56 Pin 3.3V

SOT-23

XCR3064XL-7CP56C Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Mount Surface Mount
Number of Pins 56
PackagingBulk
JESD-609 Code e0
Pbfree Code no
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 56
ECCN Code EAR99
Max Operating Temperature70°C
Min Operating Temperature 0°C
Additional FeatureYES
Terminal Position BOTTOM
Terminal FormBALL
Peak Reflow Temperature (Cel) 240
Supply Voltage 3.3V
Terminal Pitch0.5mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count56
Qualification StatusNot Qualified
Operating Supply Voltage3.3V
Supply Voltage-Max (Vsup) 3.6V
Temperature GradeCOMMERCIAL
Number of I/O 48
Memory TypeEEPROM
Propagation Delay7.5 ns
Frequency (Max) 119MHz
Programmable Logic TypeEE PLD
Number of Gates1500
Number of Logic Blocks (LABs) 4
Speed Grade 7
Output FunctionMACROCELL
Number of Macro Cells 64
JTAG BST YES
In-System Programmable YES
Length 6mm
Height Seated (Max) 1.35mm
Width 6mm
RoHS StatusNon-RoHS Compliant
Lead Free Contains Lead
In-Stock:4029 items

XCR3064XL-7CP56C Product Details

XCR3064XL-7CP56C Overview


Currently, there are 64 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.There are 48 I/Os on the board.Terminations of devices are set to 56.BOTTOM is the terminal position of this electrical part.A voltage of 3.3Vprovides power to the device.It is recommended that the chip be packaged by Bulk.In this chip, the 56 pins are programmed.If you use this device, you will also find YES.For digital circuits, there are 1500 gates. These devices serve as building blocks.Optimal efficiency requires a supply voltage of 3.3V.For data storage, EEPROM is adopted.A Surface Mount is mounted on this electronic component.There are 56 pins on it.In this case, the maximum supply voltage (Vsup) is 3.6V.It is recommended that the operating temperature exceeds 0°C.A temperature lower than 70°C is recommended for operation.The program consists of 4 logic blocks (LABs).Maximum frequency should be less than 119MHz.It is possible to classify programmable logic as EE PLD.

XCR3064XL-7CP56C Features


48 I/Os
56 pin count
56 pins
4 logic blocks (LABs)


XCR3064XL-7CP56C Applications


There are a lot of Xilinx
XCR3064XL-7CP56C CPLDs applications.


  • Bootloaders for FPGAs
  • Address decoders
  • Custom state machines
  • Digital systems
  • Portable digital devices
  • Handheld digital devices
  • Battery operated portable devices
  • Complex programmable logic devices
  • Digital designs
  • Field programmable gate

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