Welcome to Hotenda.com Online Store!

logo
userjoin
Home

XC2S100E-6FT256I

XC2S100E-6FT256I

XC2S100E-6FT256I

Xilinx

1.8V V 2mm mm FPGAs 1mm mm 256

SOT-23

XC2S100E-6FT256I Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Surface MountYES
Number of Pins 256
JESD-609 Code e0
Pbfree Code no
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 256
ECCN Code EAR99
Max Operating Temperature100°C
Min Operating Temperature -40°C
Additional FeatureMAXIMUM USABLE GATES = 100000
HTS Code8542.39.00.01
Subcategory Field Programmable Gate Arrays
Technology CMOS
Terminal Position BOTTOM
Terminal FormBALL
Peak Reflow Temperature (Cel) 240
Supply Voltage 1.8V
Terminal Pitch1mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count256
Number of Outputs 202
Operating Supply Voltage1.8V
Supply Voltage-Max (Vsup) 1.89V
RAM Size 5kB
Clock Frequency 357MHz
Programmable Logic TypeFIELD PROGRAMMABLE GATE ARRAY
Speed Grade 6
Combinatorial Delay of a CLB-Max 0.47 ns
Number of CLBs 600
Number of Logic Cells2700
Number of Equivalent Gates 37000
Length 17mm
Height Seated (Max) 2mm
Width 17mm
Radiation HardeningNo
RoHS StatusNon-RoHS Compliant
In-Stock:2312 items

XC2S100E-6FT256I Product Details

XC2S100E-6FT256I Overview


A FIELD PROGRAMMABLE GATE ARRAY-based FPGA is one of these types. In order for the device to operate, a supply voltage of 1.8V volts needs to be provided. Part of the Field Programmable Gate Arrays family, this FPGA part is a programmable gate array. A device such as this one has 202 outputs built into it. In total, it has a total of 256 terminations. For the program to work properly, the RAM si5kBe of this FPGA module must reach 5kB GB in order to ensure normal operation. In this case, 256 pins are used in the design. Design engineers can fully take advantage of its flexibility when operating at 1.8V supply voltage. When this module is operated at its maximum operating temperature, it reaches 100°C. A higher operating temperature than -40°C is recommended. A total of 256 pins are included in this device. Most of the time, it uses a crystal oscillating at 357MHz to generate the signal. An architecture consists of 600 CLBs. For the building block of this system, 2700 logic cells are included. Furthermore, it can be distinguished by the presence of a feature called MAXIMUM USABLE GATES = 100000. The FPGA implements the design using 37000 equivalent gates.

XC2S100E-6FT256I Features


256 LABs/CLBs
100°C gates


XC2S100E-6FT256I Applications


There are a lot of Xilinx
XC2S100E-6FT256I FPGAs applications.


  • Random logic
  • ASIC prototyping
  • Medical imaging
  • Computer hardware emulation
  • Integrating multiple SPLDs
  • Voice recognition
  • Cryptography
  • Filtering and communication encoding
  • Aerospace and Defense
  • Medical Electronics

Get Subscriber

Enter Your Email Address, Get the Latest News