Controller, DDR 0.76V~5.5V 260 Cel QUAD Specialized Voltage Regulator -40°C~85°C TPS59116 24 Pins 24 Terminations 24-VFQFN Exposed Pad
SOT-23
TPS59116RGER Datasheet PDF
non-compliant
Technical Specifications
Parameter Name
Value
Type
Parameter
Factory Lead Time
6 Weeks
Lifecycle Status
ACTIVE (Last Updated: 4 days ago)
Mounting Type
Surface Mount
Package / Case
24-VFQFN Exposed Pad
Surface Mount
YES
Number of Pins
24
Operating Temperature
-40°C~85°C
Packaging
Tape & Reel (TR)
Series
D-CAP™
JESD-609 Code
e4
Pbfree Code
yes
Part Status
Active
Moisture Sensitivity Level (MSL)
2 (1 Year)
Number of Terminations
24
ECCN Code
EAR99
Terminal Finish
Nickel/Palladium/Gold (Ni/Pd/Au)
Applications
Controller, DDR
Subcategory
Power Management Circuits
Terminal Position
QUAD
Peak Reflow Temperature (Cel)
260
Number of Functions
1
Supply Voltage
5V
Terminal Pitch
0.5mm
Base Part Number
TPS59116
Pin Count
24
Number of Outputs
2
Output Voltage
1.25V
Operating Supply Voltage
5.25V
Input Voltage-Nom
5V
Power Supplies
5V
Analog IC - Other Type
SWITCHING CONTROLLER
Operating Supply Current
800μA
Voltage - Input
3V~28V
Output Current
3A
Quiescent Current
800μA
Max Output Voltage
3V
Voltage - Output
0.76V~5.5V
Min Input Voltage
3V
Control Mode
CURRENT-MODE
Max Input Voltage
28V
Control Technique
PULSE WIDTH MODULATION
Min Output Voltage
750mV
Switcher Configuration
SINGLE
Height
1mm
Length
4mm
Width
4mm
Thickness
880μm
Radiation Hardening
No
RoHS Status
ROHS3 Compliant
Lead Free
Lead Free
In-Stock:5242 items
Pricing & Ordering
Quantity
Unit Price
Ext. Price
TPS59116RGER Product Details
TPS59116RGER Description
The TPS59116RGER is a Complete DDR, DDR2 and DDR3 Memory Power Solution Synchronous Buck Controller, 3-A LDO, Buffered Reference for Embedded Computing Systems.
TPS59116RGER Features
Wide-input Voltage Range: 3.0-V to 28-V
D-CAPTM Mode with 100-ns Load Step Response
Current Mode Option Supports Ceramic Output Capacitors
Supports Soft-Off in S4/S5 States
Current Sensing from Ros(on) or Resistor
2.5-V (DDR), 1.8-V (DDR2), Adjustable to 1.5-V (DDR3) or Output Range 0.75-V to 3.0-V
Equipped with Power Good, Overvoltage Protection and Undervoltage Protection
Capable to Sink and Source 3 A
LDO Input Available to Optimize Power Losses
Requires Small 20-μF Ceramic Output Capacitor
Buffered Low Noise 10-mA VREF Output
Accuracy +20 mV for both VREF and VTT
Supports High-Z in S3 and Soft-Off in S4/S5
Thermal Shutdown
TPS59116RGER Applications
DDR/DDR2/DDR3/LPDDR3 Memory Power Supplies in Embedded Computing System
SSTL-2 SSTL-18 and HSTL Termination
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