SN74LV1T125DBVR Description
A single buffer gate with lower input thresholds to assist voltage translation applications is the SN74LV1T125DBVR.
SN74LV1T125DBVR Features
– 8.0 mA output drive at 5 V
– 7.0 mA output drive at 3.3 V
– 3.0 mA output drive at 1.8 V
Characterized up to 50 MHz at 3.3-V VCC
5.0 V Tolerance on input pins
–40°C to 125°C operating temperature range
Latch-Up Performance Exceeds 250 mAPer JESD 17
Supports standard logic pinouts
CMOS output B compatible with AUP1G and LVC1G families 1
Single-supply voltage translator at 5-V, 3.3-V, 2.5-V, and 1.8-V VCC
Operating range of 1.8 V to 5.5 V
Up translation:
– 1.2 V(1) to 1.8 V at 1.8-V VCC
– 1.5 V(1) to 2.5 V at 2.5-V VCC
– 1.8 V(1) to 3.3 V at 3.3-V VCC
– 3.3 V to 5.0 V at 5.0-V VCC
– 3.3 V to 1.8 V at 1.8-V VCC
– 3.3 V to 2.5 V at 2.5-V VCC
– 5.0 V to 3.3 V at 3.3-V VCC
SN74LV1T125DBVR Applications
Telecom
Portable applications
Servers
PC and notebooks