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5962-9161101MLA(E2VNSC)

5962-9161101MLA(E2VNSC)

5962-9161101MLA(E2VNSC)

Teledyne e2v

Flip Flop

SOT-23

5962-9161101MLA(E2VNSC) Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
ECCN (US) EAR99
Logic Family ACT
Number of Channels per Chip 8
Number of Elements per Chip 1
Number of Element Inputs 8
Number of Element Outputs 8
Number of Output Enables per Element 1
Bus Hold No
Set/Reset Master Reset
Triggering Type Positive-Edge
Maximum Propagation Delay Time @ Maximum CL (ns) [email protected]
Absolute Propagation Delay Time (ns) 18
Process Technology CMOS
Input Signal Type Single-Ended
Maximum Low Level Output Current (mA) 50
Maximum High Level Output Current (mA) -50
Minimum Operating Supply Voltage (V) 4.5
Typical Operating Supply Voltage (V) 5
Maximum Operating Supply Voltage (V) 5.5
Maximum Quiescent Current (mA) 0.16
Propagation Delay Test Condition (pF) 50
Minimum Operating Temperature (°C) -55
Maximum Operating Temperature (°C) 125
Supplier Temperature Grade Military
Standard Package Name DIP
Supplier Package CDIP
Mounting Through Hole
Package Height 3.56(Max)
Package Length 32.51(Max)
Package Width 7.87(Max)
PCB changed 24
Lead Shape Through Hole
Part StatusActive
Pin Count24
Output Type 3-State
Polarity Non-Inverting
Logic Function D-Type Bus Interface
RoHS StatusRoHS non-compliant
In-Stock:4479 items

5962-9161101MLA(E2VNSC) Product Details

5962-9161101MLA(E2VNSC) Overview


It is configured with 3-Stateas an output. The D latch is equipped with 24 pins.

5962-9161101MLA(E2VNSC) Features


24 pin count


5962-9161101MLA(E2VNSC) Applications


There are a lot of Teledyne e2v
5962-9161101MLA(E2VNSC) Flip Flops applications.


  • Data storage
  • Data transfer
  • Latch
  • Registers
  • Memory
  • Frequency division
  • Memory
  • Event Detectors
  • Data Synchronizers
  • Asynchronous counter

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