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5962-9160901MLA(NSC)

5962-9160901MLA(NSC)

5962-9160901MLA(NSC)

Teledyne e2v

Shift Register

SOT-23

5962-9160901MLA(NSC) Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
ECCN (US) EAR99
Logic Family ACT
Number of Channels per Chip 8
Number of Elements per Chip 1
Number of Element Inputs 9
Number of Input Enables per Element 0
Number of Selection Inputs per Element 1
Number of Element Outputs 9
Number of Output Enables per Element 1
Bus Hold No
Triggering Type Positive-Edge
Maximum Propagation Delay Time @ Maximum CL (ns) [email protected]
Absolute Propagation Delay Time (ns) 15.5
Process Technology CMOS
Input Signal Type Single-Ended
Output Signal Type Single-Ended
Maximum Low Level Output Current (mA) 50
Maximum High Level Output Current (mA) -50
Minimum Operating Supply Voltage (V) 4.5
Typical Operating Supply Voltage (V) 5
Maximum Operating Supply Voltage (V) 5.5
Maximum Quiescent Current (mA) 0.16
Propagation Delay Test Condition (pF) 50
Minimum Operating Temperature (°C) -55
Maximum Operating Temperature (°C) 125
Supplier Temperature Grade Military
Standard Package Name DIP
Supplier Package CDIP
Mounting Through Hole
Package Height 4.57(Max)
Package Length 32.77(Max)
Package Width 7.49(Max)
PCB changed 24
Lead Shape Through Hole
Part StatusActive
Pin Count24
Output Type 3-State
Polarity Non-Inverting
Logic Function Diagnostic Register
RoHS StatusRoHS non-compliant
In-Stock:1263 items

5962-9160901MLA(NSC) Product Details

5962-9160901MLA(NSC) Overview


It has a total of zero pins.

5962-9160901MLA(NSC) Features




5962-9160901MLA(NSC) Applications


There are a lot of Teledyne e2v
5962-9160901MLA(NSC) Shift Registers applications.


  • Data Processors
  • Pseudo Random Pattern Generator
  • Pulse Extenders
  • Pattern Recognizers
  • Interconnectors
  • Counter
  • Data manipulation
  • Delay Line
  • Generate time delay toward digital circuits
  • Parallel data

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