Description
The self-contained STWD100NYWY3F watchdog timer circuits guard against system failures brought on by specific hardware flaws (such as non-responding peripherals and bus congestion) or software flaws (such as a bad code jump and a code stuck in a loop).
The watchdog timer STWD100NYWY3F has two outputs: WDO and WDI. Within the designated timeout period, twd, the input is utilized to regularly clear the internal watchdog timer. The watchdog input, WDI, is frequently toggled when the system is functioning properly. In the event of a system failure, a system alarm is generated, the watchdog output, WDO, is asserted, and the watchdog timer is not reset.
The watchdog capability of the STWD100NYWY3F circuit can also be enabled or disabled via the enable pin EN. The internal pull-down resistor is connected to the EN pin. If the EN pin is left floating, the device is enabled.
Features
-HBM: 2000 V
-CDM: 1000 V
Automotive qualified
Current consumption 13 μA typ.
Available watchdog timeout periods are 3.4 ms, 6.3 ms, 102 ms, and 1.6 s
Chip enable input
Open drain or push-pull WDO output
Applications
