STM8L050J3M3TR Description
The STM8L050J3M3TR has an upgraded STM8 CPU core that offers more processing capacity (up to 16 MIPS @ 16 MHz) while preserving the benefits of a CISC architecture with higher code density, a 24-bit linear addressing space, and an optimized architecture for low-power operations.
STM8L050J3M3TR Features
Quadrature encoder, two 16-bit timers with two channels (used as IC, OC, and PWM).
One 7-bit prescaler and 8-bit timer
2 watchdogs: 1 independent and 1 window
Beeper timer with frequencies of 1, 2, or 4 kHz.
STM8L050J3M3TR Applications
Switching applications
