STM32L496RGT3 Description
The STM32L496xx device is an ultra-low power microcontroller based on a high-performance ARM Cortex - M4 32-bit RISC core that operates at up to 80 MHz. The Cortex-M4 kernel uses floating-point unit (FPU) single precision and supports all ARM single-precision data processing instructions and data types. It also implements a complete set of DSP instructions and memory protection unit (MPU) to enhance the security of the application. STM32L496xx devices embed high-speed memory (flash memory up to 1 MB, SRAM at 320K), flexible external memory controller (FSMC) for static memory, four-way SPI flash interface (available in all packages), and various enhanced Icano and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix. STM32L496xx devices embed several protection mechanisms for embedded flash memory and SRAM: read protection, write protection, proprietary code read protection and firewall. These devices offer up to three fast 12-bit ADC (5 MSPS), two comparators, two operational amplifiers, two DAC channels, an internal reference buffer, a low power RTC, two general purpose 32-bit timers, two 16-bit PWM timers dedicated to motor control, seven general purpose 16-bit timers and two 16-bit low power timers. The device supports four digital filters for external Sigma Delta modulators (DFSDM).
STM32L496RGT3 Features
Includes ST state-of-the-art patented
technology
? Ultra-low-power with FlexPowerControl
– 1.71 V to 3.6 V power supply
– -40 °C to 85/125 °C temperature range
– 320 nA in VBAT mode: supply for RTC and
32x32-bit backup registers
– 25 nA Shutdown mode (5 wakeup pins)
– 108 nA Standby mode (5 wakeup pins)
– 426 nA Standby mode with RTC
– 2.57 μA Stop 2 mode, 2.86 μA Stop 2 with
RTC
– 91 μA/MHz run mode (LDO mode)
– 37 μA/MHz run mode (at 3.3 V SMPS
mode)
– Batch acquisition mode (BAM)
– 5 μs wakeup from Stop mode
– Brown out reset (BOR) in all modes except
shutdown
– Interconnect matrix
? Core: Arm? 32-bit Cortex?-M4 CPU with FPU,
Adaptive real-time accelerator (ART
Accelerator?) allowing 0-wait-state execution
from flash memory, frequency up to 80 MHz,
MPU, 100 DMIPS and DSP instructions
? Performance benchmark
– 1.25 DMIPS/MHz (Drystone 2.1)
– 273.55 Coremark? (3.42 Coremark/MHz at
80 MHz)
? Energy benchmark
– 279 ULPMark? CP score
– 80.2 ULPMark? PP score
? 16 timers: 2x 16-bit advanced motor-control, 2x
32-bit and 5x 16-bit general purpose, 2x 16-bit
basic, 2x low-power 16-bit timers (available in
Stop mode), 2x watchdogs, SysTick timer
STM32L496RGT3 Applications
embedded flash memory
SRAM
