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STM32G474QET3
STMicroelectronics
512KB 512K x 8 FLASH ARM® Cortex®-M4F 32-Bit Microcontroller STM32G4 Series 3V 128-LQFP
SOT-23
STM32G474QET3 Datasheet PDF
non-compliant
| Parameter Name | Value |
|---|---|
| Type | Parameter |
| Factory Lead Time | 12 Weeks |
| Mounting Type | Surface Mount |
| Package / Case | 128-LQFP |
| Surface Mount | YES |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tray |
| Series | STM32G4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 128 |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Supply Voltage | 3V |
| Terminal Pitch | 0.4mm |
| Reach Compliance Code | compliant |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 1.8V |
| Oscillator Type | Internal |
| Number of I/O | 107 |
| Speed | 170MHz |
| RAM Size | 128K x 8 |
| Voltage - Supply (Vcc/Vdd) | 1.71V~3.6V |
| uPs/uCs/Peripheral ICs Type | MICROCONTROLLER, RISC |
| Core Processor | ARM® Cortex®-M4F |
| Peripherals | Brown-out Detect/Reset, DMA, I2S, POR, PWM, WDT |
| Clock Frequency | 48MHz |
| Program Memory Type | FLASH |
| Core Size | 32-Bit |
| Program Memory Size | 512KB 512K x 8 |
| Connectivity | CANbus, I2C, IrDA, LINbus, QSPI, SPI, UART/USART |
| Bit Size | 32 |
| Data Converter | A/D 42x12b; D/A 7x12b |
| Has ADC | YES |
| DMA Channels | YES |
| PWM Channels | YES |
| Address Bus Width | 26 |
| External Data Bus Width | 16 |
| Length | 14mm |
| Width | 14mm |
| RoHS Status | RoHS Compliant |
| Quantity | Unit Price | Ext. Price |
| 1 | $15.34000 | $15.34 |
| 500 | $15.1866 | $7593.3 |
| 1000 | $15.0332 | $15033.2 |
| 1500 | $14.8798 | $22319.7 |
| 2000 | $14.7264 | $29452.8 |
| 2500 | $14.573 | $36432.5 |
The STM32G474QET3 device is built around the powerful 32-bit RISC Arm? Cortex?-M4 core. They function at up to 170 MHz of frequency.
All of the Arm single-precision data-processing commands and all data types are supported by the Cortex-M4 core's single-precision floating-point unit (FPU). Additionally, a memory protection unit (MPU) and a full set of DSP (digital signal processing) instructions are implemented, which improves the security of the application.
These devices incorporate fast memories (512 Kbytes of Flash memory and 128 Kbytes of SRAM), a flexible external memory controller (FSMC) for static memories (for devices with packages of 100 pins and more), a Quad SPI Flash memory interface, and a wide array of enhanced I/Os and peripherals connected to two APB buses, two AHB buses, and a 32-bit multi-AHB bus matrix.
The devices additionally incorporate readout protection, write protection, secure memory area, and proprietary code readout protection for embedded Flash memory and SRAM.
The gadgets incorporate peripherals that accelerate mathematical and arithmetic operations (CORDIC for trigonometric functions and FMAC unit for filter functions).
They provide three 16-bit PWM timers specifically designed for motor control, three fast 12-bit ADCs (5 Msps), seven comparators, six operational amplifiers, seven DAC channels (3 external and 4 internal), an internal voltage reference buffer, a low-power RTC, two general-purpose 32-bit timers, seven general-purpose 16-bit timers, one 16-bit low-power timer, and a high-resolution timer with 184 ps resolution.
Reset and supply management
– Power-on/power-down reset (POR/PDR/BOR)
– Programmable voltage detector (PVD)
– Low-power modes: sleep, stop, standby and shutdown
– VBAT supply for RTC and backup registers
Clock management
– 4 to 48 MHz crystal oscillator
– 32 kHz oscillator with calibration
– Internal 16 MHz RC with PLL option (± 1%)
– Internal 32 kHz RC oscillator (± 5%)
Up to 107 fast I/Os
– All mappable on external interrupt vectors
– Several I/Os with 5 V tolerant capability
Core: Arm? 32-bit Cortex?-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait-state execution from Flash memory, frequency up to 170 MHz with 213 DMIPS, MPU, DSP instructions
Operating conditions:
– VDD, VDDA voltage range: 1.71 V to 3.6 V
Mathematical hardware accelerators
– CORDIC for trigonometric functions acceleration
– FMAC: filter mathematical accelerator
Memories
– 512 Kbytes of Flash memory with ECC support, two banks read-while-write, proprietary code readout protection (PCROP), securable memory area, 1 Kbyte OTP
– 96 Kbytes of SRAM, with hardware parity check implemented on the first 32 Kbytes
– Routine booster: 32 Kbytes of SRAM on instruction and data bus, with hardware parity check (CCM SRAM)
– External memory interface for static memories FSMC supporting SRAM, PSRAM, NOR and NAND memories
– Quad-SPI memory interface
Automobile engine control systems
Implantable medical devices
Remote controls
Office machines
Appliances
Power tools
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