SPC58NN84E7RMHBR Description
The SPC58xNx microcontroller belongs to a family of devices superseding the SPC5x family. SPC58xNx is built on the legacy of the SPC5x family, while introducing new features coupled with higher throughput to provide substantial reduction of cost per feature and significant power and performance improvement (MIPS per mW).
SPC58NN84E7RMHBR Features
? AEC-Q100 qualified
? 32-bit Power Architecture VLE compliant CPU
cores:
– Five enhanced main e200z4256n3 cores,
dual issue, two paired in lockstep
– Floating Point, End-to-End Error Correction
? 6576 KB (6288 KB code flash + 288 KB data
flash) on-chip flash memory:
– supports read during program and erase
operations, and multiple blocks allowing
EEPROM emulation
– Supports read while read between the two
code Flash partitions.
? 128 KB on-chip general-purpose SRAM (in
addition to 384 KB included in the CPUs)
? 96-channel direct memory access controller
(eDMA)
? Comprehensive new generation ASIL-D safety
concept
– ASIL-D of ISO 26262
– FCCU for collection and reaction to failure
notifications
– Memory Error Management Unit (MEMU)
for collection and reporting of error events
in memories
– Cyclic redundancy check (CRC) unit
? Junction temperature range -40 °C to 165 °C
? Dual-channel FlexRay controller
? Hardware Security Module (HSM)
? GTM344 - generic timer module
SPC58NN84E7RMHBR Applications
Run Mode
Active Background Mode
