SPC56EC74B3C9EEX Description
The SPC564Bxx and SPC56ECxx is a new family of next generation microcontrollers built
on the Power Architecture embedded category. This document describes the features of the
family and options available within the family members, and highlights important electrical
and physical characteristics of the device.
SPC56EC74B3C9EEX Features
e200z4d, 32-bit Power Architecture?
Up to 120 MHz and 200 MIPs operation
? e200z0h, 32-bit Power Architecture
Up to 80 MHz and 75 MIPs operation
? Memory
Up to 3 MByte on-chip Flash with ECC
Up to 256 KByte on-chip SRAM with ECC
64KByte on-chip Data Flash with ECC
16-entry memory protection unit (MPU)
User selectable Memory BIST
? Interrupts
255 interrupt sources with 16 priority levels
Up to 54 ext. IRQ including 30 wake-up
? GPIOs: from 147 (LQFP176) to 199
(LBGA256)
