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CY74FCT823ATPC

CY74FCT823ATPC

CY74FCT823ATPC

Rochester Electronics, LLC

4.75V~5.25V D-Type Flip Flop 200μA 74FCT Series 24-DIP (0.300, 7.62mm)

SOT-23

CY74FCT823ATPC Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Mounting Type Through Hole
Package / Case 24-DIP (0.300, 7.62mm)
Supplier Device Package 24-PDIP
Operating Temperature-40°C~85°C TA
PackagingTube
Series 74FCT
Part StatusObsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Type D-Type
Voltage - Supply 4.75V~5.25V
Function Master Reset
Output Type Tri-State, Non-Inverted
Number of Elements 1
Current - Quiescent (Iq) 200μA
Current - Output High, Low 32mA 64mA
Number of Bits per Element 9
Max Propagation Delay @ V, Max CL 20ns @ 5V, 300pF
Trigger Type Positive Edge
Input Capacitance5pF
RoHS StatusROHS3 Compliant
In-Stock:14581 items

Pricing & Ordering

QuantityUnit PriceExt. Price
1$0.54000$0.54
500$0.5346$267.3
1000$0.5292$529.2
1500$0.5238$785.7
2000$0.5184$1036.8
2500$0.513$1282.5

CY74FCT823ATPC Product Details

CY74FCT823ATPC Overview


In the form of 24-DIP (0.300, 7.62mm), it has been packaged. It is contained within the Tubepackage. T flip flop uses Tri-State, Non-Invertedas its output configuration. The trigger configured with it uses Positive Edge. In this case, the electronic component is mounted in the way of Through Hole. A voltage of 4.75V~5.25Vis used as the supply voltage. The operating temperature is -40°C~85°C TA. This electronic flip flop is of type D-Type. In this case, it is a type of FPGA belonging to the 74FCT series. D latch consists of 1 elements. It consumes 200μA of quiescent JK flip flop input capacitance is 5pF farads.

CY74FCT823ATPC Features


Tube package
74FCT series

CY74FCT823ATPC Applications


There are a lot of Rochester Electronics, LLC CY74FCT823ATPC Flip Flops applications.

  • Single Down Count-Control Line
  • 2 – Bit synchronous counter
  • Set-reset capability
  • Registers
  • Control circuits
  • Frequency Divider circuits
  • Digital electronics systems
  • Balanced Propagation Delays
  • Data storage
  • Buffered Clock

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