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R7S721001VLBG#AC0

R7S721001VLBG#AC0

R7S721001VLBG#AC0

Renesas Electronics America

0.4mm ARM® Cortex®-A9 32-bit Microprocessor RZ/A1H Series 324-Pin 400MHz 1.18V 324-BGA

SOT-23

R7S721001VLBG#AC0 Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Factory Lead Time 20 Weeks
Package / Case 324-BGA
Surface MountYES
Number of Pins 324
Operating Temperature-40°C~85°C TA
PackagingTray
Series RZ/A1H
Published 2018
Pbfree Code yes
Part StatusActive
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 256
Terminal Position QUAD
Terminal FormGULL WING
Supply Voltage 1.18V
Terminal Pitch0.4mm
Frequency 400MHz
Pin Count324
Supply Voltage-Max (Vsup) 1.26V
Supply Voltage-Min (Vsup) 1.1V
Interface CAN, EBI/EMI, I2C, LIN, MMC, SCI, SD, SPI, UART, USART, USB
Oscillator TypeExternal
Number of I/O 147
Memory TypeROMless
uPs/uCs/Peripheral ICs Type MICROCONTROLLER, RISC
Core Processor ARM® Cortex®-A9
Peripherals DMA, POR, PWM, WDT
Bit Size 32
Has ADC YES
DMA Channels YES
PWM Channels YES
Address Bus Width26
Core Architecture ARM
External Data Bus Width 32
Voltage - I/O 1.2V 3.3V
Ethernet 10/100Mbps (1), 100Mbps (1)
Number of Cores/Bus Width 1 Core 32-Bit
Graphics AccelerationYes
RAM Controllers SDRAM, SRAM
USB USB 2.0 (2)
Additional Interfaces CAN, I2C, IEBus, IrDA, LIN, MediaLB, MMC/SD/SDIO, SCI, SCI FIFO, SPDIF, SPI, SSI
Co-Processors/DSP Multimedia; NEON™ MPE
Display & Interface ControllersDVD, VDC
Length 28mm
RoHS StatusROHS3 Compliant
In-Stock:240 items

Pricing & Ordering

QuantityUnit PriceExt. Price
1$38.64000$38.64
500$38.2536$19126.8
1000$37.8672$37867.2
1500$37.4808$56221.2
2000$37.0944$74188.8
2500$36.708$91770

R7S721001VLBG#AC0 Product Details

R7S721001VLBG#AC0 Description


The R7S721001VLBG#AC0 is a single-chip microcontroller that includes an Arm Cortex®-A9 processor along with the integrated peripheral functions required to configure a system.



R7S721001VLBG#AC0 Features


  • Am Cortex-A9 processor

  • Maximum operating frequency: 400 MHz

  • Instruction cache size: 32 Kbytes

  • Data cache size: 32 Kbytes (write-back algorithm)

  • TLB entries: 128 entries

  • JazelleE architecture extension: Full implementation

  • Media processing engine with NEONTM technology

  • Am CoreLinkTM Level 2 Cache Controller L2C-310

  • Operating frequency: 133 MHz

  • Cache size: 128 Kbytes

  • Arm PrimeCell Generic Interrupt Controller (PL 390)

  • External interrupt pins (NMI, IRQ7 to IRQ0, and TINT170 to TINT0)

  • On-chip peripheral interrupts: Priority level set for each module

  • 32 priority levels available

  • Address space is divided into six areas (0 to 5). each a maximum of 64 Mbytes



R7S721001VLBG#AC0 Applications


  • Industrial

  • General Uses


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