S9S12G128F0MLF Description
The S9S12G128F0MLF is an optimized, automotive, 16-bit microcontroller from the MC9S12G-Family. It isis intended to bridge between high-end 8-bit microcontrollers and high-performance 16-bit microcontrollers, such as the MC9S12XS-Family.
S9S12G128F0MLF Features
S12 CPU core
Up to 240 Kbyte on-chip flash with ECC
Up to 4 Kbyte EEPROM with ECC
Up to 11 Kbyte on-chip SRAM
Phase locked loop (IPLL) frequency multiplier with internal filter
4–16 MHz amplitude controlled Pierce oscillator
1 MHz internal RC oscillator
Timer module (TIM) supporting up to eight channels that provide a range of 16-bit input capture, output compare, counter, and pulse accumulator functions
Full 16-bit data paths support efficient arithmetic operation and high-speed math execution
Includes many single-byte instructions. This allows much more efficient use of ROM space.
Up to 240 Kbyte of program flash memory
Up to 4 Kbyte EEPROM
Up to 11 Kbytes of general-purpose RAM
Data registers and data direction registers for ports A, B, C, D, E, T, S, M, P, J and AD when used as general-purpose I/O
Control registers to enable/disable pull devices and select pullups/pulldowns on ports T, S, M, P, J and AD on a per-pin basis
Single control register to enable/disable pull devices on ports A, B, C, D and E, on a per-port basis and on BKGD pin
Control registers to enable/disable open-drain (wired-or) mode on ports S and M
Loop control Pierce oscillator using a 4 MHz to 16 MHz crystal
Trimmable internal reference clock.
Phase-locked-loop clock frequency multiplier
S9S12G128F0MLF Applications
Body controllers
Occupant detection
Door modules
Seat controllers
RKE receivers
Smart actuators
Lighting modules
Smart junction boxes
