MCF5206EAB54 Description
A DRAM controller, timers, parallel and serial interfaces, system integration, and a Version 2 ColdFire core are all included in the MCF5206e integrated microprocessor. The CPU in this thing is an improved version of the ColdFire MCF5206. The MCF5206e has been improved with a larger 4 Kbyte I-cache, an 8 KByte SRAM, a higher frequency, a Multiply Accumulate (MAC) unit, hardware division, and two channels of DMA. A low-cost option is the MCF5206e CPU, which operates at 54MHz and delivers 50 Dhrystone 2.1 MIPs.
MCF5206EAB54 Features
Version 2 ColdFire? Core.
Multiply-Accumulate Module and Hardware Divide Unit.
4 KByte Direct-Mapped Instruction Cache.
8 KByte On-Chip SRAM.
DRAM Controller, supports EDO and page mode DRAMs.
2-channel DMA Controller.
Two Universal Synchronous/Asynchronous Receiver/Transmitters (UART).
Dual 16-Bit General-Purpose Multimode Timers.
I2C?-Compatible Bus
MCF5206EAB54 Applications
Power Management
Consumer Electronics
Portable Devices
Industrial