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MC9S12XEQ512MAL

MC9S12XEQ512MAL

MC9S12XEQ512MAL

NXP USA Inc.

512KB 512K x 8 FLASH 16-Bit Microcontroller HCS12X Series MC9S12XEQ512 1.8V 112-LQFP

SOT-23

MC9S12XEQ512MAL Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Factory Lead Time 12 Weeks
Mounting Type Surface Mount
Package / Case 112-LQFP
Surface MountYES
Operating Temperature-40°C~125°C TA
PackagingTray
Series HCS12X
Published 1998
JESD-609 Code e3
Part StatusActive
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 112
Terminal Finish Matte Tin (Sn)
Additional FeatureIT ALSO REQUIRES 5 V I/O SUPPLY
HTS Code8542.31.00.01
Terminal Position QUAD
Terminal FormGULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.8V
Terminal Pitch0.65mm
Time@Peak Reflow Temperature-Max (s) 40
Base Part Number MC9S12XEQ512
JESD-30 Code S-PQFP-G112
Qualification StatusNot Qualified
Supply Voltage-Max (Vsup) 1.98V
Power Supplies3.3/5V
Supply Voltage-Min (Vsup) 1.72V
Oscillator TypeExternal
Number of I/O 91
Speed 50MHz
RAM Size 32K x 8
Voltage - Supply (Vcc/Vdd) 1.72V~5.5V
uPs/uCs/Peripheral ICs Type MICROCONTROLLER, RISC
Peripherals LVD, POR, PWM, WDT
Clock Frequency 40MHz
Program Memory TypeFLASH
Core Size 16-Bit
Program Memory Size 512KB 512K x 8
Connectivity CANbus, EBI/EMI, I2C, IrDA, SCI, SPI
Bit Size 32
Data Converter A/D 16x12b
Has ADC YES
DMA Channels NO
PWM Channels YES
DAC Channels NO
ROM (words) 524288
EEPROM Size 4K x 8
CPU Family CPU12
Length 20mm
Height Seated (Max) 1.6mm
Width 20mm
RoHS StatusROHS3 Compliant
In-Stock:311 items

Pricing & Ordering

QuantityUnit PriceExt. Price
1$20.19000$20.19
10$18.61900$186.19
25$17.78200$444.55
300$15.16700$4550.1
600$14.43480$8660.88

MC9S12XEQ512MAL Product Details

MC9S12XEQ512MAL Description


The MC9S12XEQ512MAL MCU comes from the MC9S12XE-Family of microcontrollers which is a further development of the S12XD-Family including new features for enhanced system integrity and greater functionality.



MC9S12XEQ512MAL Features


  • Upward compatible with MC9S12 instruction set with the exception of five Fuzzy instructions (MEM, WAV, WAVR, REV, REVW) which have been removed

  • Enhanced indexed addressing

  • Access to large data segments independent of PPAGE

  • Eight levels of nested interrupts

  • Flexible assignment of interrupt sources to each interrupt level.

  • External non-maskable high priority interrupt (XIRQ)

  • Internal non-maskable high-priority Memory Protection Unit interrupt

  • Up to 24 pins on ports J, H and P configurable as rising or falling edge sensitive interrupts

  • Up to four chip select outputs to select 16K, 1M, 2M and up to 4MByte address spaces

  • Each chip select output can be configured to complete the transaction on either the time-out of one of the two wait state generators or the deassertion of the EWAIT signal



MC9S12XEQ512MAL Applications

  • General Uses


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