LPC4370FET100E Description
The LPC4370FET100E is an Arm Cortex-M4-based microcontroller for embedded applications. It features an Arm Cortex-M0 coprocessor, an Arm Cortex-M0 subsystem for managing peripherals, 282 kB of SRAM, advanced configurable peripherals like the State Configurable Timer (SCT), Serial General Purpose I/O (SGPIO) interface, two High-speed USB controllers, Ethernet, LCD, an external memory controller, and numerous digital Up to 204 MHz of CPU frequency can be used by the LPC4370.
With system improvements like reduced power consumption, improved debug tools, and a high level of support block integration, the Arm Cortex-M4 is a next-generation 32-bit core. The Harvard architecture, 3-stage pipeline, separate local instruction and data buses, third bus for peripherals, and internal prefetch unit with capability for speculative branching are all features of the Arm Cortex-M4 CPU. Single-cycle digital signal processing and SIMD instructions are supported by the Arm Cortex-M4 processor. The core contains an integrated hardware floating-point processor.
An application Arm Cortex-M0 coprocessor and a second Arm Cortex-M0 subsystem for controlling the SGPIO and SPI peripherals are both included in the LPC4370FET100E. The 32-bit Arm Cortex-M0 core is a low-power, user-friendly core that is code and tool compatible with the Cortex-M4 core. The performance of both Cortex-M0 cores, which have a small code size and a limited instruction set, is up to 204 MHz.
LPC4370FET100E Features
264 kB SRAM for code and data use on the main AHB multilayer matrix plus 18 kB of SRAM on the Cortex-M0 subsystem
Multiple SRAM blocks with separate bus access. Two SRAM blocks can be powered down individually
64 kB ROM containing boot code and on-chip software drivers
64-bit + 256 bit general-purpose One-Time Programmable (OTP) memory
Serial GPIO (SGPIO) interface
State Configurable Timer (SCT) subsystem on AHB
Global Input Multiplexer Array (GIMA) allows to cross-connect multiple inputs and outputs to event driven peripherals like the timers, SCT, and ADC0/1
Arm Cortex-M4 processor, running at frequencies of up to 204 MHz
Arm Cortex-M4 built-in Memory Protection Unit (MPU) supporting eight regions
Arm Cortex-M4 built-in Nested Vectored Interrupt Controller (NVIC)
Hardware floating-point unit
Non-maskable Interrupt (NMI) input
JTAG and Serial Wire Debug (SWD), serial trace, eight breakpoints, and four watch points
Enhanced Trace Module (ETM) and Enhanced Trace Buffer (ETB) support
System tick timer
Arm Cortex-M0 coprocessor capable of off-loading the main Arm Cortex-M4 processor
Running at frequencies of up to 204 MHz
JTAG and built-in NVIC
Cortex-M0 subsystem:
Arm Cortex-M0 processor controlling the SPI and SGPIO peripherals residing on a separate AHB multilayer matrix with direct access to 2 kB + 16 kB of SRAM
Running at frequencies of up to 204 MHz
Connected via a core-to-core bridge to the main AHB multilayer matrix and the main Arm Cortex-M4 processor
JTAG and built-in NVIC
LPC4370FET100E Applications
