74AUP1G374GW,125 Overview
The flip flop is packaged in a case of 6-TSSOP, SC-88, SOT-363. There is an embedded version in the package Tape & Reel (TR). T flip flop uses Tri-State, Non-Invertedas its output configuration. This trigger is configured to use Positive Edge. The electronic part is mounted in the way of Surface Mount. A voltage of 0.8V~3.6Vis required for its operation. It is operating at a temperature of -40°C~125°C TA. The type of this D latch is D-Type. It belongs to the 74AUPseries of FPGAs. You should not exceed 309MHzin its output frequency. As a result, it consumes 500nA of quiescent current without being affected by external factors. Currently, there are 6 terminations. Members of the 74AUP1G374family make up this object. Power is supplied from a voltage of 1.1V volts. There is 0.8pF input capacitance for this T flip flop. In terms of electronic devices, this device belongs to the AUP/ULP/Vfamily of devices. Surface Mount mounts this electronic component. There are 6pins on it. It has a clock edge trigger type of Positive Edge. Flip flops designed with 1bits are used in this part. Keeping the supply voltage (Vsup) above 0.8V is necessary for normal operation. Despite its superior flexibility, it relies on 1 circuits to achieve it.
74AUP1G374GW,125 Features
Tape & Reel (TR) package
74AUP series
6 pins
1 Bits
74AUP1G374GW,125 Applications
There are a lot of Nexperia USA Inc. 74AUP1G374GW,125 Flip Flops applications.
- ATE
- Bus hold
- Safety Clamp
- Bounce elimination switch
- Frequency division
- Load Control
- Set-reset capability
- Modulo – n – counter
- ESD performance
- Single Down Count-Control Line
