DSPIC30F5013-30I/PT Description
The DSPIC30F5013-30I/PT is a High-Performance, Digital Signal Controller.
DSPIC30F5013-30I/PT Features
Modified Harvard architecture
C compiler-optimized instruction set architecture
Flexible addressing modes
83 base instructions
24-bit comprehensive instructions, 16-bit wide data path
66 Kbytes on-chip Flash program space
4 Kbytes of on-chip data RAM
1 Kbyte of nonvolatile data EEPROM
16 x 16-bit working register array
Up to 30 MIPS operations:
- DC to 40 MHz external clock input
- 4 MHz-10 MHz oscillator input with
PLL active (4x, 8x, 16x)
Up to 41 interrupt sources:
- Eight user-selectable priority levels
- Five external interrupt sources
- Four processor traps
DSPIC30F5013-30I/PT Applications
