24LC512T-I/SM Description
The Microchip Technology Inc. 24LC512T-I/SM is a 64K x 8 (512 Kbit) Serial Electrically Erasable PROM, capable of operation across a broad voltage range (1.7V to 5.5V). It has been developed for advanced, low-power applications such as personal communications and data acquisition. The 24LC512T-I/SM also has a page write capability of up to 128 bytes of data. This device is capable of both random and sequential reads up to the 512K boundary. Functional address lines allow up to eight devices on the same bus, for up to 4 Mbit address space.
24LC512T-I/SM Features
2-Wire Serial Interface, I2C™ Compatible
Cascadable for up to Eight Devices
Schmitt Trigger Inputs for Noise Suppression
Output Slope Control to Eliminate Ground Bounce
100 kHz and 400 kHz Clock Compatibility
Page Write Time 5 ms max.
Self-Timed Erase/Write Cycle
128-Byte Page Write Buffer
Hardware Write-Protect
24LC512T-I/SM Applications
Automotive
Hybrid, electric & powertrain systems
Industrial
Medical
Enterprise systems
Datacenter & enterprise computing
