LC4256V-10TN176I Description
LC4256V-10TN176I is a 3.3v In-System Programmable SuperFAST High-Density PLD. The ispMACH LC4256V-10TN176I consists of multiple 36-input, 16-macrocell Generic Logic Blocks (GLBs) interconnected by a Global Routing Pool (GRP). Output Routing Pools (ORPs) connect the GLBs to the I/O Blocks (IOBs), which contain multiple I/O cells.
LC4256V-10TN176I Features
fMAX = 400 MHz maximum operating frequency
tPD = 2.5 ns propagation delay
Enhanced macrocells with individual clock, reset, preset and clock enable controls
Up to four global OE controls
Superior solution for power-sensitive consumer applications
Operation with 3.3 V, 2.5 V, or 1.8 V LVCMOS I/O
LC4256V-10TN176I Applications
Communications equipment
Datacom module
Industrial
Electronic point of sale (EPOS)
Enterprise systems
Datacenter & enterprise computing
