ICS813253BGLF Overview
Clock PLL is embedded in the TSSOP package. LVDS is designed for clock generator's input. 1 circuits are used to achieve clock PLL's superior flexibility. 156.25MHz is the maximal value for normal operation. The operating temperature should be higher than 0°C. The operating temperature should be lower than 70°C.
ICS813253BGLF Features
Available in the TSSOP
ICS813253BGLF Applications
There are a lot of Integrated Device Technology (IDT)
ICS813253BGLF Clock Generators applications.
- Wireless infrastructure
- Instrument
- Automatic test equipment
- Wide area power system
- Digital circuits
- Wireless base station for LTE, LTE-advanced
- Picocells, femtocells and small cells
- Sampling clocks for ADC and DAC
- 1 Gigabit Ethernet
- 10 Gigabit Ethernet
