3D3428Z-0.5 Overview
A 255 tap/step configuration is provided. A terminal is located at DUAL. As its logic type, SILICON DELAY LINE is used. Based on advanced CMOS technology, it has been developed. If the minimum supply voltage is 3 V, it is acceptable for it to operate. It is acceptable for it to operate at the maximum voltage 3.6 V.
3D3428Z-0.5 Features
with SILICON DELAY LINE bits
3D3428Z-0.5 Applications
There are a lot of Data Delay Devices
3D3428Z-0.5 Delay Lines Timing ICs applications.
- Portable and Battery-Powered Equipment
- Clock Synchronization
- Digital Systems
- Embedded Systems
- Utility Meters
- Security Systems
- Network Hubs, Bridges, and Routers
- QDR/QDRII Memory Systems
- Multiphase Clock Generation
- LCD Televisions
