S25FL128SAGNFM000 Description
The S25FL128SAGNFM000 connects to a host system via an SPI. Traditional SPI single-bit serial input and output (Single I/O or SIO) is supported as well as optional two-bit (Dual I/O or DIO) and four-bit (Quad I/O or QIO) serial commands. This multiple-width interface is called SPI Multi-I/O or MIO. In addition, the FL-S family adds support for DDR read commands for SIO, DIO, and QIO that transfer addresses and read data on both edges of the clock.
S25FL128SAGNFM000 Features
CMOS 3.0 Volt Core with Versatile I/O
SPI with Multi-I/O
READ Commands
100,000 Program-Erase Cycles, minimum
20 Year Data Retention, minimum
Cypress® 65 nm MirrorBit® Technology with Eclipse™ Architecture
Core Supply Voltage: 2.7V to 3.6V
I/O Supply Voltage: 1.65V to 3.6V
S25FL128SAGNFM000 Applications
Communications equipment
Wired networking
Industrial
Test & Measurement
Personal electronics
PC & notebooks
