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LP560M450A1P3

LP560M450A1P3

LP560M450A1P3

Cornell Dubilier Electronics (CDE)

CAP ALUM 56UF 20% 450V SNAP

SOT-23

LP560M450A1P3 Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Factory Lead Time 25 Weeks
Mount Through Hole
Mounting Type Through Hole
Package / Case Radial, Can - Snap-In
Dielectric MaterialALUMINUM (WET)
Operating Temperature-40°C~105°C
PackagingBulk
Published 2013
Series LP
Size / Dimension 0.866Dia 22.00mm
Tolerance ±20%
JESD-609 Code e3
Pbfree Code yes
Part StatusActive
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 2
Termination Snap in
ECCN Code EAR99
Terminal Finish Tin (Sn)
Applications General Purpose
Capacitance 56μF
Voltage - Rated DC 450V
Lead Pitch 10mm
Capacitor Type ALUMINUM ELECTROLYTIC CAPACITOR
Lead Spacing0.394 10.00mm
Lifetime @ Temp 1000 Hrs @ 105°C
Leakage Current 0.47624mA
Ripple Current500mA
Polarization Polar
Life (Hours) 1000 hours
ESR 5924 mΩ
Diameter 22mm
Height 25mm
Height Seated (Max) 0.984 25.00mm
REACH SVHC Unknown
RoHS StatusROHS3 Compliant
In-Stock:3071 items

Pricing & Ordering

QuantityUnit PriceExt. Price
720$2.33731$1682.8632

About LP560M450A1P3

The LP560M450A1P3 from Cornell Dubilier Electronics (CDE) is a high-performance microcontroller designed for a wide range of embedded applications. This component features CAP ALUM 56UF 20% 450V SNAP.

Key Features

  • Advanced AVR architecture for efficient processing
  • Wide operating temperature range: -40°C to 85°C
  • Low power consumption for energy-efficient applications
  • Comprehensive peripheral set including SPI, UART, and USART interfaces

Applications

This microcontroller is ideal for various applications including:

  • Industrial control systems
  • Consumer electronics
  • Automotive systems
  • IoT devices
  • Medical equipment

Technical Support

Hotenda provides comprehensive technical support for the LP560M450A1P3, including datasheets, application notes, and design resources. Our team of engineers is available to assist with your design challenges.

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