AD9268BCPZ-105 Description
The AD9268BCPZ-105 is a dual, 16-bit, 80 MSPS/105 MSPS/125 MSPS analog-to-digital converter (ADC). The AD9268BCPZ-105 is designed to support communications applications where high performance, combined with low cost, small size, and versatility, is desired. The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth and differential sample-and-hold analog input amplifiers that support a variety of user-selectable input ranges.
AD9268BCPZ-105 Features
SNR = 78.2 dBFS @ 70 MHz and 125 MSPS
SFDR = 88 dBc @ 70 MHz and 125 MSPS
Low power: 750 mW @ 125 MSPS
1.8 V analog supply operation
1.8 V CMOS or LVDS output supply
Integer 1-to-8 input clock divider
Optional on-chip dither
Programmable internal ADC voltage reference
Integrated ADC sample-and-hold inputs
AD9268BCPZ-105 Applications
Communications
Diversity radio systems
Multimode digital receivers (3G)
- GSM, EDGE, W-CDMA, LTE,
- CDMA2000, WiMAX, TD-SCDMA
I/Q demodulation systems
Smart antenna systems
General-purpose software radios
Broadband data applications
Ultrasound equipment
