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EPM5064JC-1

EPM5064JC-1

EPM5064JC-1

Altera

5V 1.27mm PMIC 5V

SOT-23

EPM5064JC-1 Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Surface MountYES
JESD-609 Code e0
Pbfree Code no
Number of Terminations 44
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn/Pb)
Additional FeatureLABS INTERCONNECTED BY PIA; 4 LABS; 64 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
HTS Code8542.39.00.01
Terminal Position QUAD
Terminal FormJ BEND
Peak Reflow Temperature (Cel) 220
Supply Voltage 5V
Terminal Pitch1.27mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count44
JESD-30 Code S-CQCC-J44
Qualification StatusNot Qualified
Operating Temperature (Max) 70°C
Supply Voltage-Max (Vsup) 5.25V
Power Supplies5V
Temperature GradeCOMMERCIAL
Supply Voltage-Min (Vsup) 4.75V
Number of I/O 28
Clock Frequency 50MHz
Propagation Delay40 ns
Organization 7 DEDICATED INPUTS, 28 I/O
Programmable Logic TypeUV PLD
Output FunctionMACROCELL
Number of Macro Cells 64
JTAG BST NO
Number of Dedicated Inputs 7
In-System Programmable NO
Length 16.51mm
Height Seated (Max) 4.57mm
Width 16.51mm
RoHS StatusNon-RoHS Compliant
In-Stock:1776 items

EPM5064JC-1 Product Details

EPM5064JC-1 Overview


There are 64 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.The device has 28 inputs and outputs.There are 44 terminations programmed into the device.As the terminal position of this electrical part is QUAD, it serves as an important access point for passengers or freight.Power is supplied by a voltage of 5V volts.It is programmed with 44 pins.The device can also be used to find LABS INTERCONNECTED BY PIA; 4 LABS; 64 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK.In order for the device to operate, it requires 5V power supplies.Vsup reaches 5.25V as the maximum supply voltage.A total of 7dedicated inputs are available for the purpose of detecting input signals.A supply voltage (Vsup) of greater than 4.75V should be used.The clock frequency of the device should not exceed 50MHz.Programmable logic types can be divided into UV PLD.Keep the operating temperature below 70°C.

EPM5064JC-1 Features


28 I/Os
44 pin count
5V power supplies


EPM5064JC-1 Applications


There are a lot of Altera
EPM5064JC-1 CPLDs applications.


  • Interface bridging
  • I/O expansion
  • Discrete logic functions
  • Bootloaders for FPGAs
  • Address decoders
  • Custom state machines
  • Digital systems
  • Portable digital devices
  • Handheld digital devices
  • Battery operated portable devices

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