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EP1810LC20T

EP1810LC20T

EP1810LC20T

Altera

5.08mm mm FPGAs 1.27mm mm 68

SOT-23

EP1810LC20T Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Surface MountYES
JESD-609 Code e0
Pbfree Code no
Number of Terminations 68
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn/Pb)
Additional FeatureMACROCELLS INTERCONNECTED BY GLOBAL AND/OR LOCAL BUS; 48 MACROCELLS; 4 EXTERNAL CLOCKS
HTS Code8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal FormJ BEND
Peak Reflow Temperature (Cel) 220
Supply Voltage 5V
Terminal Pitch1.27mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count68
JESD-30 Code S-PQCC-J68
Qualification StatusNot Qualified
Operating Temperature (Max) 70°C
Supply Voltage-Max (Vsup) 5.25V
Power Supplies5V
Temperature GradeCOMMERCIAL
Supply Voltage-Min (Vsup) 4.75V
Number of I/O 48
Clock Frequency 50MHz
Propagation Delay22 ns
Organization 12 DEDICATED INPUTS, 48 I/O
Programmable Logic TypeOT PLD
Output FunctionMACROCELL
Number of Macro Cells 48
JTAG BST NO
Number of Dedicated Inputs 12
In-System Programmable NO
Length 24.23mm
Height Seated (Max) 5.08mm
Width 24.23mm
RoHS StatusNon-RoHS Compliant
In-Stock:4397 items

EP1810LC20T Product Details

EP1810LC20T Overview


There are OT PLD transistors in this type of FPGA. Its 48 I/Os help it transfer data more efficiently. Power is provided by a 5V-volt supply. An FPGA part from the Programmable Logic Devices family. In total, there are a total of 68 terminations on fpga chips. Power is supplied to the device by a 5V battery. Featuring 68 pins in total, it is a versatile device. Most commonly, this device makes use of an oscillating crystal frequency of 50MHz to operate. The MACROCELLS INTERCONNECTED BY GLOBAL AND/OR LOCAL BUS; 48 MACROCELLS; 4 EXTERNAL CLOCKS feature also characterizes fpga circuit. It has 12 dedicated inputs in which the status of the signals on the input is detected. In order to keep this FPGA from malfunctioning, the supply voltage should be greater than 4.75V. CPLDs are built and controlled by a number of macrocells, which is the main part of the device. There should not be an increase in operating temperature over 70°C. 000 degrees Celsius.

EP1810LC20T Features


48 I/Os


EP1810LC20T Applications


There are a lot of Altera
EP1810LC20T FPGAs applications.


  • Integrating multiple SPLDs
  • Voice recognition
  • Cryptography
  • Filtering and communication encoding
  • Aerospace and Defense
  • Medical Electronics
  • Audio
  • Automotive
  • Consumer Electronics
  • Distributed Monetary Systems

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