M24256-BWMN6TP

DocID6757 Rev 32

19/39

M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF

Instructions

38

5.2 Read 

operations

Read operations are performed independently of the state of the Write Control (WC) signal.

After the successful completion of a Read operation, the device internal address counter is 
incremented by one, to point to the next byte address.

For the Read instructions, after each byte read (data out), the device waits for an 
acknowledgment (data in) during the 9th bit time. If the bus master does not acknowledge 
during this 9th time, the device terminates the data transfer and switches to its Standby 
mode.

Figure 10. Read mode sequences

Start

Dev sel *

Byte addr

Byte addr

Start

Dev sel

Data out 1

AI01105d

Data out N

Stop

Start

Current
Address
Read

Dev sel

Data out

Random
Address
Read

Stop

Start

Dev sel *

Data out

Sequential
Current
Read

Stop

Data out N

Start

Dev sel *

Byte addr

Byte addr

Sequention
Random
Read

Start

Dev sel *

Data out1

Stop

ACK

R/W

NO ACK

ACK

R/W

ACK

ACK

ACK

R/W

ACK

ACK

ACK

NO ACK

R/W

NO ACK

ACK

ACK

ACK

R/W

ACK

ACK

R/W

ACK

NO ACK

M24256-BWMN6TP Information:
Part No.
M24256-BWMN6TP

RFQ

Description
IC EEPROM 256KBIT 1MHZ 8SO
File Size
715127 bytes
Page Size
595 x 842 pts (A4)
All Pages
39
Manufacturer
STMicroelectronics
Homepage
http://www.st.com/web/en/home.html
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