A few days ago, Intel began shipping Agilex, the latest FPGA product launched this year. This FPGA chip integrates almost all of Intel's current technological innovations. It uses a 10 nanometer process, and supports heterogeneous 3D SiP stereo package, PCIe 5.0 bus, DDR5/HBM/AoTeng DC persistent memory, eASIC device, One API unified development interface, CXL bus.
It is understood that this FPGA chip has been supplied to Microsoft, SILC and other companies. These Agilex chips will be used in network development, 5G, data analysis and other solutions. Based on the second-generation HyperFlex architecture, the Agilex FPGA chip delivers a 40% performance improvement over the previous generation Stratix 10, a 40% reduction in power consumption and a DSP (FP16) performance of up to 40 TELOPS. At the data transmission and reception rate, Agilex's transceiver speed reaches 112Gbps.
Agilex is a combination of Agile and Flexible, and these two features are the two core points of modern FPGA technology.
Specifically, "flexibility" refers to programmability. It is based on the core technology of FPGA - programmable logic array, which can be flexibly programmed for different application scenarios and change the logical structure and function of FPGA.
"Agility" refers to heterogeneity, which can be heterogeneous between different logical units, heterogeneous in different processes, or both. The mature process and iteration time corresponding to different types of IP are different. Only by adopting a heterogeneous architecture can we give full play to the advantages of different IPs and different process nodes, and learn from each other to achieve a good balance between performance and cost. Therefore, heterogeneous FPGAs are also the main direction of current and future industry development and research.
This is also Intel's first FPGA with 10nm process. It was released in early April this year and is the first FPGA product that integrates almost all of Intel's current innovative technologies. In addition to the 10nm process, it also includes: heterogeneous 3D SiP stereo package, PCIe 5.0 bus, DDR5/HBM/AoTeng DC persistent memory, eASIC device One API unified development interface, cache and memory consistency high-speed interconnect bus CXL (for scalable to strong).
Based on the second-generation HyperFlex architecture, Agilex FPGAs can achieve up to 40% performance improvement or up to 40% power reduction compared to existing Straix 10 FPGAs. The only support for BFLOAT16, DSP FP16 half-precision floating-point performance up to 40TFlops (40 trillion per second) Times), INT8 integer performance is up to 92Tops, transceiver data rate is up to 112Gbps, currently the industry's first.
In terms of software, there is Intel Quartus Prime design software that can maximize the performance and efficiency of Intel FPGFA, CPLD, SoC products.
In addition, Agilex FPGAs can be used with Xeon, Core, Atom, Movidius neural computing sticks, and Nervana deep learning chips.