The objective of this article is to provide users of Cree wide bandgap devices with a guideline of the thermal performance of high power SiC MESFET and GaN HEMT transistors. It explains the methodology that Cree uses to determine the thermal resistance values listed in its datasheets. As with all semiconductor devices, SiC MOSFET and GaN HEMT device reliabilities are dependent directly on maximum operating channel temperature. It is therefore important to determine, with a high degree of confidence, what the maximum channel temperature is under specific operating modes, particularly for products operating under CW and dissipating large amounts of thermal energy.
Thermal resistance determination
Cree uses a dual-mannered approach in determining the thermal resistance of its wide bandgap transistor and MMIC products. The use of Infrared (IR) microscopy and finite element analysis (FEA) are employed to produce accurate channel to case temperature differentials, from which a θjc (junction to case thermal resistance) can be calculated.
IR microscopy is performed using a Quantum Focus Instruments’ Infrascope II IR microscope at 5x magnification (see Figure 1). A device under test (DUT) is placed into a suitable test fixture for IR measurement. The test fixture is placed on top of a temperature-controlled heatsink. In order to gain visible access to the die surface, all DUTs must have their lids or plastic encapsulant removed prior to IR imaging. Dependent on the package type, the DUT is either bolted down or soldered into the fixture. For devices that are bolted down, a thin layer of thermal grease is applied to the bottom of the package to ensure that the least amount of contact resistance exists between the package and the fixture. Thermal grease is also used at the interface between the fixture and the heatsink. The fixtures used for IR imaging are modified such that a thermocouple can be placed under the backside of the package to monitor the package case temperature (see Figure 2). All IR imaging is performed with the heatsink temperature set to 75°C. A minimum of eight to ten devices from multiple lots are IR scanned to produce a significant amount of data points, which can then be correlated to FEA models.
The devices are measured under DC drive at varying heat densities. The thermal resistance values listed on the data sheets are generally defined by the worst-case heat-load condition for the application. Please refer to the specific product data sheet for the conditions under which the devices are tested.
Figure 1: Infrascope II set-up.
Figure 2: DUT in fixture with external TC.
Finite element analysis is performed using Ansys® software. The models are created in such a fashion that they reproduce how the devices are actually measured with the IR camera system. For all transistor applications, this includes a packaged device in the fixture with the bottom of the fixture having a boundary condition of 75°C. If possible, models are sectioned as permitted by symmetry to reduce computational resources. See Figure 3 for a typical cross-section of a geometric model.
Figure 3: Cross section of ¼ model.
Once the IR camera and modeling data have been acquired, thermal resistance of the device is calculated:
Tj(channel temperature) - Tc(case temperature)
It is important to note that the case temperature of the package (as measured by the thermocouple), and NOT the fixture, is used for the calculations. The datasheet thermal resistance numbers represent only the packaged device.
Figure 4: Cross section of gate showing averaging effect.
Correlation of IR measurements to simulation results is accomplished using a statistical analysis approach. It is important to note that the measured results produced by the IR imaging equipment are spatially averaged in areas of high heat flux. This is due to the fact that the resolution of the IR camera at 5x magnification is on the order of 7 µm and the actual heat source is less than 1 µm in width and buried under various metal and passivation layers.
The averaging effect produces measured data that is significantly lower than the actual peak channel temperature. To determine if the FEA data and IR data correlate, the average temperature of the FEA model is calculated across a 7 µm sectioned centered on the heat source. A two-sided 95% confidence interval of the mean temperature rise is determined based on the IR measurement data. If the averaged FEA data falls within the confidence interval limits of the IR data, correlation between the model and IR data is considered to be successful. The peak temperature of the FEA model is used to establish the thermal resistance of the device. Figures 4 and 5 show how correlation is achieved for a GaN HEMT device.
Figure 5: IR measurement data.
Transient thermal analysis
Since many systems employing power amplifiers operate in modes other than CW, it is equally important to understand the transient response of a device. With almost an infinite number of pulse width and duty cycle combinations, an effective way of communicating θjc vs. time is essential. The best approach is plotting θjc vs. time in a semi-log scale for several duty cycles. All transient thermal analysis is performed using finite element analysis as current IR imaging techniques do not provide sufficient resolution to determine true peak channel temperatures. Figure 6 shows heating curves for a 28.8 mm HEMT device operating at 8 W/mm.
Figure 6: Heating curves for a 28.8 mm HEMT device operating at 8 W/mm.
A word of caution
In its simplest terms, the thermal resistance of a packaged device can be represented as the sum of a series of component resistances, as shown below.
θjc = θ die + θ die attach + θ package
Although this is a basic foundation, it is very important to understand that the total resistance is composed of many complex heat transfer mechanisms. The values derived in the datasheets are calculated under specific operating conditions. Using these values in a "casual way" to try and determine thermal resistances in scenarios other than how they were measured will lead to erroneous results. A simple example, shown in Figure 7 below, demonstrates how thermal resistance of a packaged device changes with power density. This effect is driven by the non-linear thermal properties of both SiC and GaN materials.
Figure 7: Thermal rise vs. power density.
More unintuitive changes can also occur as a result of modifications made to the system. The next example (Figure 8) shows that changing the packaging material affects not only the thermal resistance of the product, but also each of the components. When the package material is changed from a Copper Moly Copper (CMC) material with a thermal conductivity (K) of 300 W/mK to a diamond composite material with a K of 600 W/mK, intuition would tell us that the resistance of the package will drop by some factor. What is not as evident is that the resistance of the die will also be affected as seen by the breakdown of thermal resistance through each component. In this case, the resistance of the die is decreased as a result of the package material providing a better heat spreading medium.
Figure 8: Thermal resistance impacts due to material alterations.
Similar types of unintuitive changes can occur when features such as component thickness, fixture materials, or power density changes are made. It is, therefore, strongly recommended, before using datasheet values to derive a thermal resistance for a particular design, that operating conditions are similar to those used for the characterization of the device.
This article has given a summary of the thermal properties which need to be taken into consideration when designing an amplifier employing SiC MESFET or GaN HEMT transistors.