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The transceiver boards are divided into two sections that can be easily split apart. Silicon Labs even encourages you to split them apart and use the transceiver module directly in your own designs. To do so, you need to remove a “zero-ohm resistor” that then bypasses the PCB antenna and routes the output of the PA to an F-connector for use with an external antenna.
The transceiver portion of the board is built around Silicon Labs’ “next-generation EZRadio” chip, the Si4455 (see Figure 2). The chip is a complete sub-GHz RF transceiver including a PA and SPI MCU interface. The Si4455 covers all the major sub-GHz bands from 283 to 960 MHz. In TX mode, the chip draws 18 mA from a 1.8 to 3.6 V supply at +10 dBm output (+13 dBm max). It can transmit using FSK, GFSK, and OOK modulation with a maximum data rate of 500 kbps.
In RX mode, the chip draws 10 mA and drops back to 50 nA in standby mode, which is where most low-power protocols will let it spend most of its time. Receive sensitivity is -116 dBm with the receiver incorporating both AFC and AGC. Packet handling includes preamble, sync word detection, and CRC checking. The only thing lacking to make this a complete RF module is a crystal, some L/C components, and an antenna, all of which are supplied on the kit’s PCB (see Figure 3).
Figure 3: Si4455 applications circuit (Courtesy of Silicon Labs).
If you are not familiar with Silicon Labs’ EZRadio technology, Hotenda carries an EZRadio Overview product training module that will get you up to speed.
The processor side of the board is based on Silicon Labs’ C8051F930 MCU (see Figure 4). The chip is designed for use with ultra-low-power single-cell battery-operated devices; it can operate down to 0.9 volts, by which time an integrated DC-DC boost converter kicks in. The core is a single-cycle 8051 CPU with 25 MIPS peak throughput at 25 MHz. It draws 4.1 mA in active mode, 0.6 μA in sleep mode with RTC on, and 50 nA with RTC off. The C8051F930 includes a 10-bit ADC capable of up to 300 ksps, two programmable comparators, 4352 bytes of RAM (256 + 4 K), 64 kB of Flash, 24 I/O ports, on-chip debug, four programmable 16-bit counter/timers, and a 16-bit programmable counter array. The pipelined architecture executes 70 percent of instructions in one or two clock cycles. This is not a Gen 1 8051.
Hotenda carries not one, but two product training modules that further explain the C8051F930: C8051F9xx Lower Power MCUs and Designing for Low Power Operation using the C8051F9xx family.
Range test demo
Out of the box, you can quickly run the range test demo that is pre-flashed onto the MCU. To do so, you just plug in the batteries, turn on the boards, press the right buttons, and learn to read the pattern of flashing LEDs to see when packets have been transmitted and received. LEDs one and two indicate transmission and reception of packets. LEDs three and four in combination with a buzzer indicate the packet error rate (PER). Different patterns exist for PER < 1%, PER > 1%, PER > 5%, and PER >20%. There are also different patterns to indicate whether a board is transmitting or receiving. I initially found this confusing but managed to figure it out, and it worked as advertised. In fact, for an outdoor range test – when it is hard to read the LEDs in bright sunlight – the buzzer turned out to be a good idea.
By pressing the right combination of four buttons on the board in the right sequence you can change the node address, frequency, type of modulation, and the data rate of each transceiver. Data rates in OOK mode are 2.4, 9.6, and 20 kbps and in GFSK mode the data rates are 9.6, 38.4, and 128 kbps. You can also set custom rates and switch to simple FSK, but only by programming the board using Silicon Labs Wireless Development Suite (WDS) or the Silicon Labs IDE – but more on that later. I went with the default settings for the BER test: 433.92 MHz, high-precision GFSK at 9.6 kbps.
I set one board on transmit and mounted it on a tripod, set the other on receive, picked up the latter and started walking. The BER went over one percent at about 100 meters; five percent by 150 meters; and 20 percent at about 400 meters. In their own range tests, Silicon Labs did much better, though the results are not directly comparable. In their tests, Silicon Labs ran two identical 434 MHz boards using 2-level FSK modulation with a deviation of 30 kHz, a data rate of 2.4 kbps, +11 dBm PA output and an antenna gain of -9 dB for an effective isotropic radiated power (EIRP) of +1.7 dBm. Using this setup, they were able to maintain communication between the two boards for over 1 km. Try that at 2.4 GHz.
I found the PCB antennas to be highly directional. When they were not aimed at each other, I could not get 50 feet without losing the connection. They looked like they might be Yagi antennas, but they are in fact a balanced inverted F-antenna (BIFA) configuration (see Figure 5). The far end of the antenna is essentially a folded dipole with the thick PCB traces feeding it, forming a 90-ohm differential strip line between single-ended PA output, the printed balun, and the antenna, which together form a 50-ohm series resonant circuit that matches the impedance of the PA. The curled arms of the antenna – which I originally thought were reflectors – are there to reduce the size of the antenna and tune its impedance. Typical of dipoles, the maximum gain is perpendicular to the antenna (-10 dB in this case) and falls off rapidly to the sides.
Figure 5: PCB antenna on the Si4455 RF Stick (Courtesy of Silicon Labs).
Differential antennas, or dipoles generally, have one major advantage over the monopole antennas commonly found in handheld devices – the ground plane does not have much influence on the radiation characteristic, making them easier to lay out and less susceptible to environmental influences. These antennas are commonly used in garage door openers, keychain RKE dongles, and other remote control applications.
Getting with the program
Moving beyond the range test demo involves reprogramming the boards using Silicon Labs’ Wireless Development Suite (WDS). You can run WDS in Simulation Mode to test out how well different communication parameters might serve you in practice; or you can connect one of the RFSticks to your computer via a ToolStick Base Adaptor and USB extension cable and configure the RF parameters in the Si4555 directly. After experimenting with the simulator, I chose to do the latter.
The Configuration Wizard lets you check out the projected results of your available choices before committing them to silicon (see Figure 6, right). For example, I choose to run the board in FSK mode with a 2.4 kbps data rate, 30 kHz deviation, channel bandwidth of 114 kHz, power output of -14 dBm and use the PCB BIFA antenna, the maximum outdoor range for the board is 870 meters; however the maximum range allowed under FCC Part 15 regulations is only 215 meters. In Europe (click the ETSI button) that is no longer a problem – the maximum power now jumps to 3 dBm and the allowed outdoor range is 870 meters.
Figure 6: Configuring the Si4555 using the WDS Configuration Wizard.
These complete, well-documented C projects allow you to compile, flash into silicon, and run on the board. They are also instructive for learning how the various chip functions and interfaces work – and of course, useful as building blocks for your own projects.
To start a Silicon Labs IDE project, I started the software. It asked if I would like to connect now. I connected an RFStick board to a ToolStick and plugged the devices into a USB port. The program recognized the board and popped up the Open Workspace window. I selected the CW_Transmit_SDCC.wsp workspace file and all the project files loaded into the IDE. From the Project menu I selected Tool Chain Integration and clicked on the SDCC assembler, compiler, and linker programs. I then rebuilt the project, downloaded it to the MCU, and ran the resulting program (see Figure 7). The entire process was smooth and almost intuitive for anyone used to using SDCC or Keil tools.