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Choosing a data converter with too much resolution, an overly high number of bits, reduces the sampling and reconstruction rates possible in the system. The reduced data rates introduce a risk of aliasing error. Aliasing occurs when the sampling rate is close to the Nyquist bandwidth for the signal being sampled (fa). The sample frequency is denoted as fs. The Nyquist bandwidth is defined to be the frequency spectrum from DC to fs/2. The frequency spectrum is divided into an infinite number of Nyquist zones, each having a width equal to 0.5 fs. The assumption is that for correct capture and reconstruction fs is greater than 2 fa. In practice, the ideal sampler is replaced by an ADC followed by an FFT processor. The FFT processor only provides an output from DC to fs/2, i.e. the signals or aliases which appear in the first Nyquist zone.
Having determined these two basic criteria for converter selection, the next step is to examine the detailed specifications of the converters based on the needs of the sensors. These specifications include rate of change; sensitivity; whether they are processing single-ended or differential signals; whether the sensor information is being used in an absolute or relative change fashion; and the linearity requirements over the temperature range of the sensors. These factors all directly drive the linearity (both integral and differential) specifications of the converter as well as pre- and post-filtering, buffering, and sample-and-hold requirements. The details on these other specifications are explained in the ADI training module, but are further clarified in the Texas Instruments PTM module on Data Converter Basics.
DACs and closing the loop
In closed-loop sensor systems, the output of the digital microcontroller has to be converted back to an analog signal to be used in real-time applications. These devices generally handle motor control, offset trim, and calibration. For most feedback applications, the DACs use a voltage or current reference that is smaller than the full scale of the signals from the sensors. This is the case since it is a correction signal that is being sent, not a full signal.
The Microchip MCP4706 family of DACs is typical in this regard. These parts are available in 8-, 10-, and 12-bit versions with the same pin-out. While designed for full-signal restoration and rail-to-rail output, these devices are typically used with the VREF pin to provide an intermediate full-scale level and a finer degree of control with a reduced LSB step. Figure 3 shows a block diagram of the MCP4706 in its voltage in-and-out mode. Some applications, such as offset control, cannot utilize a voltage output. In those cases, a transconductance amplifier is used on the output of the DAC to help close the loop. An operational transconductance amplifier (OTA), such as the On Semiconductor NE5517DG, is typically used for current-output configurations. These amplifiers are completely self-contained and provide a single or dual signal path for isolated current conversion. Figure 4 shows the block diagram of the NE5517DG OTA.
The advantage of an OTA is the presentation of a uniform loading on the output of the DAC. This allows the system to have a predictable settling time and remain isolated from system noise. It also helps avoid peaking that may result from application of the feedback and calibration signals to the motor control or other environmental/electromechanical system being monitored. Similar to the current output, it is best practice to use a unity-gain voltage follower at the output of the DAC to provide system stability and improved response. Typical DACs have a minimum load resistance level – in the case of the MCP4706 it is 5 KΩ – for the output to be stable. The use of external amplifiers allows for driving lower-impedance nodes.
Data capture through analog-to-digital conversion
Sensor systems generally produce voltages or currents as a measurement of their current environmental condition. To be able to process these inputs in an automated fashion, they need to be converted into a digital representation. These measurements are quantized or captured in both the time and frequency domains. The temporal aspect of the continuous signals is one of the key points in determining the type of ADC to use. The three primary types of ADCs are Flash, successive approximation, and sigma-delta.
Because of the Flash architecture and its derivatives, the multi-stage Flash and pipeline converters are the fastest method. This is a parallel configuration where the sampled signal appears at the top of a reference string. There are multiple simultaneous circuits that all check if the magnitude of the signal is greater than their reference voltage. In this method, the time delay for a sample is one device path (a comparator and latch). The drawback is that for high resolution you need 2n comparators for an n-bit converter. This large parallel configuration not only consumes a great deal of power, but it is also a very heavy capacitive load on the signal being sampled. In order to speed up the converter, the reference resistor string is designed to have a minimized resistance, which may cause a problem for the sensor to drive such low impedance without impacting the performance of the sensor.
A typical multistage Flash converter is Texas Instruments’ TLC0820AIDW as shown in Figure 5. This 8-bit converter combines two 4-bit Flash converters with an embedded DAC to balance the two-step approach. It provides a worst case 2.5 μsec conversion time with a 1.18 μsec average. The device targets fast moving signals up to 100 mV/μsec, and can capture the signals in as little as 100 ns. To support this signal capture, the device has a built-in track-and-hold amplifier. This amplifier is tuned to the load of the ADC sub-sections, isolating the input signal from the clocking and switching of the two sub-converters and the DAC.
The successive approximation converter from ADI (see Figure 8) is designed for high sample-rate, high-resolution data conversion. This converter gives full-scale adjacent sample results at 1 Msps, and only requires a sample time of 290 ns to acquire the signal. The device is designed for use in applications where the result of the signal acquisition is a new, unique 18-bit code for every sample. Rather than having a continuous mode, this device resembles Flash converters and is bound by the Nyquist criteria for the sample rate. Driving this part requires a differential input. Some sensors provide a single-ended output that needs to be converted to differential with a very low offset and distortion. Specialized drivers such as Analog Devices’ ADA4941-1 have been designed for the specific purpose of driving high-resolution ADCs. These amplifiers have a very short path delay and a high impedance output stage to allow for minimal interference with the signal prior to sampling.
Figure 8: Analog Devices’ AD7982 ADC block diagram. (Courtesy of Analog Devices.)