Power Supply Design Responds to Needs for Greater Power Density

Those taking more than a casual interest in power supplies (PSUs), either AC/DC or DC/DC, will have noticed that integration and miniaturization have been making a big impact recently. Why is this? 

This short review looks back at a few of the interesting announcements of the last year to uncover novel developments being applied by PSU vendors. Developments that are designed to decrease size for a given power level and yet maintain reliability with improved thermal management. Solving this combination of problems is not easy. It’s a balance between topologies easing design headaches and finding improved components and manufacturing approaches.


Several organizations monitor power roadmaps including the PSMA (Power sources manufacturers association) which reported trends at APEC last March (2014) including:

  • For isolated DC/DC expect:
    • >300 W, 1.2 V output in ¼ brick by 2015
    • Adoption of GaN switch devices
    • Strong growth in 3D packaging techniques
  • For non-isolated DC/DC expect:
    • Improved functional performance (e.g. regulation and noise)
    • Improved thermal and package performance
    • The emergence of more digital control
  • For AC/DC expect:
    • Wide-scale use of power factor correction (PFC)
    • Pressure to reduce no-load consumption
    • Increased focus on primary-side control

These trends show three factors influencing development: customer need, component improvements (e.g., ICs – controllers and active power devices as well as passives) and manufacturing innovation (including investment in systems in package technology). All well and good, but what’s currently the best-in-class?

Class leadership

By its nature, with so many suppliers, this is a constantly shifting landscape. However, let’s take some data points based on recent headline grabbing news:

  • December 2014, Vicor’s High-Voltage ChiP BCM wins Power System Product of the Year at Europe’s Elektra Awards, claiming power densities greater than 2750 W/in3.
  • October 2014: XP Power introduces ECE60 60W AC/DC, with a 40% size advantage.
  • October 2014: Architects of modern power (AMP) consortium formed.
  • April 2014, CUI Inc. sets new benchmark with the release of its 60 A digital Point-of-Load (POL) regulator.
  • November 2013, Intersil launches the ZL8800 dual phase, compensation free, digital power control IC.

So how do these events evidence advances in the power design body of knowledge?

Let’s start at the IC level with Intersil’s ZL8800 dual phase digital PWM controller. It supports switching from 200 kHz up to 1.33 MHz, which helps reduce physical size of the power inductor. Also, by providing two control phases it allows smaller passive component selection, as current can be shared across phase pairs. It sets a new standard in ease of use of digital control. It’s a fourth-generation controller that completely negates the need for compensation. This is important. Digital control now offers engineers the opportunity to optimize power supply operation without always needing to re-design hardware.

Besides the obvious system monitoring benefits of digital implementations, less obvious but more significant from an innovator’s perspective, is the control flexibility offered. Traditionally, switch-mode design uses fixed-frequency switching coupled with voltage or current mode feedback. Selecting fixed frequency leads to predictable currents in the passive energy storage components easing their selection. These components are sized on the needs at the output; load current; acceptable ripple voltage; and noise. Compensating the control loop happens after these initial decisions. The trouble is, these decisions complicate compensation, since there can be large variations in the components used and differences in the application environment. This approach often leads to a control loop with sub-optimal bandwidth and compromised stability.

Consider inductor tolerance. These non-linear components vary based on average current, temperature, switching frequency and their age. Non-ferrite inductors are notorious here: over their rated range they can vary by 50%, representing a real optimization challenge. In creating a stable loop, the system bandwidth may be reduced by as much as fswitch/10.  This demands oversized output capacitors to make good on transient energy demands. That’s a less than desirable situation when focusing on system miniaturization (and cost).

However, digital control can completely eliminate this trade off. The ZL8800 claims to be the first product of its kind to offer a compensation-free solution without sacrificing system bandwidth. The part’s secret is a proprietary system called ChargeMode, which works to replenish any charge loss from the output capacitor(s) during a transient event. The control loop over-samples the output and allows a design to use smaller output capacitors for a given application. The non-linear ChargeMode ensures that an energy reserve is maintained. This key aspect sets this digital implementation apart from traditional compensation systems. The resulting output has minimal ringing and overshoot.

An early example of a compact point-of-load (POL) design produced using the ZL8800 is CUI Inc.’s NDM3Z-60 featuring a headline 60 A output capability. It handles one of the tough POL applications; supplying low processor core voltages (micro-controllers and FPGAs) ranging from 0.6 to 1.5 V with high efficiency. Aside from benefiting from the compensation advances of the ZL8800, a second advance is its use of SEPIC fed buck topology helping to lower component stress and increase per cycle energy transfer - establishing a power density breakthrough of 445 W/in3.

A new AC/DC industry benchmark

Although at a considerably lower power density of just 10 W/in3, the new ECE60 series from XP Power provides a compact 60 W solution for offline power. It too establishes a new performance yardstick considering that it manages to combine universal operation from 85 to 264 VAC input, provide isolation, and meet the latest EMC and power factor standards. It claims a 40% size advantage over competing alternatives. These units can supply a peak load capability up to 130% of nominal load for up to 30 seconds and a wide operating temperature range from -25°C to +70°C. These PSUs also return a very respectable 89% conversion efficiency.

Figure 1: ECE60 series AC/DC power supply. (Courtesy XP Power)

New era of advanced thermal management

Most conventional PSU designs mount power-dissipating elements (MOSFETs and power inductors) on one side of a printed circuit board and rely on heat being removed from the top side of the design, mainly through thermal conduction. However, to meet increased power density demand, there’s a growing trend to deploy 3D design techniques to provide a larger dissipating volume through clever use of modern packaging technologies and materials.

Astonishing 3 kW/in3 now possible

Vicor is not the first company to demonstrate ‘chip scale’ integrated power modules, that accolade probably belongs to Enpirion (now a part of Altera); however, Vicor has been one of the most aggressive at raising benchmark power densities. They lay claim to a 3 kW/in3 capability today. Next-generation modules using their ChiP (convertor housed in package) technology have provided an impressive quadrupling in power density and a 20% reduction in power loss compared to previous generations. This move allows customers to achieve unprecedented system size, weight and efficiency gains. They are also very space efficient (850 W/in2) and provide up to 98% peak conversion efficiency.

How was this performance leap achieved? Via a combination of steps including the application of 3D package technology. The ChiP secret, as applied in Vicor’s BCM and DCM series, is its use of integrated high-frequency magnetic structures combined with a high density interconnecting substrate. The design makes optimal use of space using a symmetrical, two-sided board layout that doubles power handling and power density. Dissipated heat can be conducted away from both sides of the unit. The thermal model for a typical ChiP module is shown below in Figure 2. The two dominant bulk power dissipation paths (via package top and bottom) are obvious.

Figure 2: Thermal model of new Vicor ChiP halves thermal resistance. (Courtesy of Vicor)

The initial portfolio includes five different package sizes. Besides impressive power density, these solutions are low profile. Figure 3 shows just how tiny these products have become.

Figure 3: ChiP package size options. (Courtesy of Vicor)

Consortium set to drive digital standards forward

The versatility that power supplies derive from digital control is a double-edged sword for consumers and suppliers of power modules alike. Without some level of standardization, selecting one approach over another creates undesirable lock-in on a critical system element. This is recognized by the industry leading to the recent formation of the Architects of Modern Power (AMP) consortium, which has just announced its first power standards.

Consortium members CUI Inc., Ericsson and Murata seek to establish common mechanical and electrical specifications for intelligent power systems. So far two standards have been proposed to help ensure interoperability and safe second source choice for users, greatly reducing selection risk of next generation modules.

As we scale new heights in power density, it is all too easy to overlook the engineering effort it has taken to get to here. In this summary of an exciting year for power innovation, we have seen how several developments have worked together to attain new performance benchmarks. That surely sums up the art of engineering at its very best.