High-Step-Down-Ratio Buck Converters for Intermediate Bus Architectures


 
Telecom systems and data center computers using distributed power architecture often employ intermediate bus voltage to power a variety of loads spread throughout the system boards. Traditionally, the intermediate bus voltage has been 48 VDC. However, electronic circuits and devices on the boards can use voltages ranging from 3.3 V down to 1 V and lower, with high current consumption. For example, the core voltage for the latest generation of processors is 1 V or less with current requirements of over 100 A. Similarly, other electronic loads, such as FPGAs and memory devices, also have stringent power supply needs.

Because designing high-step-down-ratio DC/DC converters featuring high efficiency is not simple or cost effective, most designers choose to further lower the bus voltage down to 24 V, 12 V, or lower using intermediate bus converter modules or bricks. They then use high-speed nonisolated point-of-load (POL) step-down or buck regulators to generate voltages of 3.3 V and below to power different loads on the system board.

The challenge is in designing high-step-down-ratio DC/DC buck converters that can deliver 48 to 3.3 V and below, while maintaining high efficiency and density with minimal cost. Normally, such high-step-down-ratio DC/DC converters are less efficient than desired and quite challenging to design, especially with silicon devices. Nevertheless, by combining advances in architecture with creative circuit design and packaging manufacturers such as Vicor have successfully addressed this issue. At the same time, using the high-voltage capabilities of gallium nitride (GaN) devices, suppliers like Efficient Power Conversion (EPC) have developed enhancement-mode GaN (eGaN) FET-based buck converters to tackle these problems efficiently and cost effectively and with high power density.

Silicon solutions

Let’s first look at the silicon-based solutions. One power supply maker that has been successful in developing an efficient silicon solution to address high-step-down-ratio buck converters with high density is Vicor. The company is extending its novel proprietary architecture called factorized power architecture (FPA) to generate a high-step-down-ratio DC/DC converter solution that can take 48 V bus input and step it down to load voltage as low as 1 V. Unlike traditional DC/DC circuits, Vicor’s FPA approach takes into account distribution and connector losses as well.

By separating the classic function of DC/DC converters, FPA and its novel power conversion building blocks, PRMs and VTMs, can provide efficient power system solutions from the intermediate bus voltage to the processor core. To accomplish this goal, FPA takes the regulation, isolation, and voltage transformation functions of a typical DC/DC converter and separates or factorizes them into individual elements. These individual components, belonging to the VI Chip family, are then arranged in the optimal power architecture as shown in Figure 1.



Figure 1: PRM and VTM modules are fundamental building blocks of factorized power architecture (FPA).

The VI Chip PRM regulators use a non-isolated buck-boost topology to create a tightly regulated, adjustable DC output – the factorized bus VF – which feeds into the VTM transformer. The fixed ratio transformer VTM uses Sine Amplitude Converter topology to down-convert VF directly to the load voltage. The architecture uses MHz-frequency zero-voltage (ZVS) and zero-current switching (ZCS) to achieve high efficiency and high power density. According to Vicor’s white paper¹ on the topic, the PRM modules are rated to deliver up to 97 percent peak efficiency and over 1,000 W/in³ density. Vicor also reports that VTM is rated for 94 percent peak efficiency with a density of 100 A/in³.

Combining a PRM regulator such as PRM48BH480T200A00 with the VTM transformer VTM48EF012T130A00, Vicor has generated a DC/DC solution (Figure 2) that takes 48 V bus voltage and generates a low processor core voltage of 1 V in compliance with Intel’s VR12.0 specifications. As shown, this FPA powertrain uses a separate VID controller IC, which acts as a translator between the processor VID and the powertrain. As per Vicor, the FPA powertrain uses optimal fast analog control loop to provide accurate processor core voltage.



Figure 2: Combining PRM and VTM modules in a factorized power architecture, Vicor has created an efficient 48 to 1 V processor core voltage buck converter.

Efficiency performance testing on a voltage regulator test board created by Vicor shows that the FPA-based solution is more efficient than comparable traditional IBA-based solution. In fact, according to Vicor’s internal tests, the FPA-based solution is 5 percentage points more efficient than a traditional solution from 60 percent to 100 percent processor load (Figure 3). There is a similar improvement in size. The company claims a 50 percent improvement in board space as compared to the traditional IBA approach that uses a bus converter to first lower the 48 V to an intermediate level. Additionally, the FPA-based 48 to 1 V DC/DC solution also delivers load line and transient response performance as per the Intel VR12.0 specifications, and does not use unreliable electrolytic capacitors.

Figure 3: The 48 V to VR12.0 processor core voltage DC/DC solution based on Vicor’s factorized power architecture is significantly more efficient than comparable traditional solution.

Using eGaN FETs

Enhancement-mode gallium nitride (eGaN) FETs supplier Efficient Power Conversion (EPC) is recommending the use of eGaN FETs for this application². Some key benefits of the eGAN transistor touted by the company include lower on-resistance, higher breakdown voltage, higher switching frequencies, and improved system efficiency and power density. In essence, eGaN FET overcomes the minimum on-time problem of silicon MOSFETs to enable very efficient, compact high-step-down-ratio buck converters.

To simplify the task of evaluating the 48 to 5 V and lower voltage nonisolated buck converters using eGaN FETs, EPC has built the EPC9002 and EPC9006 evaluation boards for its 100 V eGaN devices. However, unlike Vicor’s isolated solution, eGaN FET-based high-step-down-ratio buck converters are non-isolated circuits. Using eGaN FETs in a half-bridge configuration, the company has built a 48 to 1.2 V buck converter and compared its efficiency performance with a leading-edge silicon MOSFET-based version using the same driver, Texas Instruments’ LM5113. The measured efficiency performance of the two step-down converters operated at 500 kHz switching frequency is depicted in Figure 4. It shows that eGaN-based, high-step-down-ratio buck converters are more efficient than their silicon counterparts from light to full load.

Figure 4: EPC measurements show the eGaN FET-based high-step-down-ratio buck converter is more efficient than silicon counterpart from light to full load.

In summary, the examples discussed in this article show that both isolated and non-isolated, high-step-down-ratio DC/DC converters are available today to meet the challenges of going from 48 V intermediate bus voltage down to the processor voltage. While silicon continues to maintain an edge in the isolated sector, GaN transistors are emerging as a viable solution for non-isolated high-step-down-ratio buck converters. For more information on the parts mentioned in this article, use the links provided to access product pages on the Hotenda website.

References

  1. White paper “From 48 V direct to Intel VR12.0: Saving ‘Big Data’ 500,000 per datacenter, per year” by Stephen Oliver, vice president, VI Chip Product Line, Vicor Corp., Andover, MA
  2. High Step-Down Ratio Buck Converters With eGaN Devices”, by Johan Strydom, Efficient Power Conversion, El Segundo, Calif. and Bob White, Embedded Power Labs, Highlands Ranch, Colo.
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