MR25H10CDC

6

Copyright © Everspin Technologies 2013

MR25H10 Rev. 9, 4/2013

MR25H10

SPI COMMUNICATIONS PROTOCOL

Figure 2.3 WRDI

Figure 2.2 WREN

Write Enable (WREN)

TheWriteEnable(WREN)commandsetstheWriteEnableLatch(WEL)bitinthestatusregisterto1.The

WELbitmustbesetpriortowritinginthestatusregisterorthememory.TheWRENcommandisentered

bydrivingCSlow,sendingthecommandcode,andthendrivingCShigh.

Write Disable (WRDI)

TheWriteDisable(WRDI)commandresetstheWELbitinthestatusregisterto0.Thispreventswritesto

statusregisterormemory.TheWRDIcommandisenteredbydrivingCSlow,sendingthecommandcode,

andthendrivingCShigh.
TheWELbitisresetto0onpower-uporcompletionofWRDI.

Write Status Register (WRSR)

TheWriteStatusRegister(WRSR)commandallowsnewvaluestobewrittentotheStatusRegister.The

WRSRcommandisnotexecutedunlesstheWriteEnableLatch(WEL)hasbeensetto1byexecutinga

WRENcommandwhilepinWPandbitSRWDcorrespondtovaluesthatmakethestatusregisterwritable

asseenintable2.4.StatusRegisterbitsarenon-volatilewiththeexceptionoftheWELwhichisresetto0

uponpowercycling.

SI

SO

CS

Instruction (06h)

High Impedance

Mode 3

Mode 0

Mode 3

Mode 0

1

0

2

3

4

5

6

7

0

0

0

0

0

1

1

0

SCK

SCK

SI

SO

CS

Instruction (04h)

High Impedance

Mode 3

Mode 0

Mode 3

Mode 0

1

0

2

3

4

5

6

7

0

0

0

0

0

1

0

0

MR25H10CDC Datasheet Related Products:
MR25H10CDC Information:
Part No.
MR25H10CDC
Description
IC MRAM 1MBIT 40MHZ 8DFN
File Size
1965258 bytes
Page Size
612 x 792 pts (letter)
All Pages
20
Manufacturer
EverSpin Technologies, Inc.
Homepage
http://everspin.com/
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