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Product data sheet
Rev. 3 — 3 August 2010
7 of 48
40-bit Fm+ I
C-bus advanced I/O port with RESET, OE and INT
HVQFN56 package die supply ground is connected to both V
pins and exposed center pad. V
must be connected to supply ground for proper device operation. For enhanced thermal, electrical, and
board level performance, the exposed pad needs to be soldered to the board using a corresponding
thermal pad on the board and for proper heat conduction through the board, thermal vias need to be
incorporated in the printed-circuit board in the thermal pad region.
Figure 1 “Block diagram of PCA9698”
7.1 Device address
Following a START condition the bus master must send the address of the slave it is
accessing and the operation it wants to perform (read or write). The address of the
PCA9698 is shown in
. Slave address pins AD2, AD1 and AD0 choose 1 of
64 slave addresses. To conserve power, no internal pull-up resistors are incorporated on
AD2, AD1 and AD0. Address values depending on AD2, AD1 and AD0 can be found in
Table 12 “PCA9698 address map”
The last bit of the first byte defines the operation to be performed. When set to logic 1 a
read is selected while a logic 0 selects a write operation.
address input 2
active LOW output enable
active LOW interrupt output/
active LOW SMBus alert
active LOW reset input
PCA9698 device address